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Searched refs:ETH_TSR_IDLE (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/arm/at91/
at91emacreg.h	`132 #define ETH_TSR_IDLE 0x08U /* 1 = transmitter idle */`
at91emac.c	`153 \| ETH_TSR_IDLE \| ETH_TSR_RLE 183 while (sc->txqc > (tsr & ETH_TSR_IDLE ? 0 : 1)) { 339 \| ETH_TSR_IDLE \| ETH_TSR_RLE 735 \| ETH_TSR_IDLE \| ETH_TSR_RLE`
/src/sys/dev/cadence/
cemacreg.h	`187 #define ETH_TSR_IDLE __BIT(3) /* 1 = transmitter idle */`
if_cemac.c	`182 \| ETH_TSR_IDLE \| ETH_TSR_RLE 216 (tsr & ETH_TSR_IDLE ? 0 : 1))) { 458 \| ETH_TSR_IDLE \| ETH_TSR_RLE 1066 \| ETH_TSR_IDLE \| ETH_TSR_RLE`

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