| /src/external/gpl3/binutils/dist/bfd/ |
| elfxx-riscv.c | 1446 {"b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1447 {"v", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1448 {"h", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1454 {"zic64b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1455 {"ziccamoa", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1456 {"ziccif", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1457 {"zicclsm", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1458 {"ziccrse", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1459 {"zicbom", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1460 {"zicbop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }
[all...] |
| cpu-riscv.h | 28 ISA_SPEC_CLASS_DRAFT,
|
| /src/external/gpl3/binutils.old/dist/bfd/ |
| elfxx-riscv.c | 1440 {"b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1441 {"v", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1442 {"h", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1448 {"zic64b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1449 {"ziccamoa", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1450 {"ziccif", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1451 {"zicclsm", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1452 {"ziccrse", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1453 {"zicbom", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1454 {"zicbop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }
[all...] |
| cpu-riscv.h | 28 ISA_SPEC_CLASS_DRAFT,
|
| /src/external/gpl3/gdb/dist/bfd/ |
| elfxx-riscv.c | 1331 {"b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1332 {"v", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1333 {"h", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1339 {"zic64b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1340 {"ziccamoa", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1341 {"ziccif", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1342 {"zicclsm", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1343 {"ziccrse", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1344 {"zicbom", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1345 {"zicbop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }
[all...] |
| cpu-riscv.h | 28 ISA_SPEC_CLASS_DRAFT,
|
| /src/external/gpl3/gdb.old/dist/bfd/ |
| elfxx-riscv.c | 1337 {"b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1338 {"v", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1339 {"h", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1345 {"zicbom", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1346 {"zicbop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1347 {"zicboz", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1348 {"zicond", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1349 {"zicntr", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 },
1354 {"zihintntl", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
1355 {"zihintpause", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }
[all...] |
| cpu-riscv.h | 28 ISA_SPEC_CLASS_DRAFT,
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| riscv-dis.c | 44 static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1;
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| riscv-dis.c | 39 static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1;
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| riscv-dis.c | 1439 pd->default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1;
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| riscv-dis.c | 1439 pd->default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1;
|
