| /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| CSKYMCCodeEmitter.cpp | 41 uint16_t LO16 = static_cast<uint16_t>(Bin);
47 support::endian::write<uint16_t>(OS, LO16, support::little);
|
| /src/external/bsd/pcc/dist/pcc/arch/powerpc/ |
| table.c | 38 #define LO16(x) # x "@l"
41 #define LO16(x) "lo16(" # x ")"
767 " addi AL,AL," LO16(AR) "\n", },
774 " addi AL,AL," LO16(AR) "\n"
776 " addi UL,UL," LO16(UR) "\n", },
789 " lwz AL," LO16(AR) "(AL)\n", },
803 " lwz AL," LO16(AR) "(AL)\n"
805 " lwz UL," LO16(UR) "(UL)\n", },
832 " lbz AL," LO16(AR) "(AL)\n", }
[all...] |
| /src/external/gpl3/binutils/dist/opcodes/ |
| iq2000-opc.c | 252 /* addi ${rt-rs},$lo16 */
255 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
258 /* addi $rt,$rs,$lo16 */
261 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
264 /* addiu ${rt-rs},$lo16 */
267 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
270 /* addiu $rt,$rs,$lo16 */
273 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
312 /* andi ${rt-rs},$lo16 */
315 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } }
[all...] |
| lm32-opc.c | 386 /* ori $r1,$r0,$lo16 */
389 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
554 /* mvu $r1,$lo16 */
557 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
|
| lm32-opinst.c | 144 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
220 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| iq2000-opc.c | 252 /* addi ${rt-rs},$lo16 */
255 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
258 /* addi $rt,$rs,$lo16 */
261 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
264 /* addiu ${rt-rs},$lo16 */
267 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
270 /* addiu $rt,$rs,$lo16 */
273 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
312 /* andi ${rt-rs},$lo16 */
315 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } }
[all...] |
| lm32-opc.c | 386 /* ori $r1,$r0,$lo16 */
389 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
554 /* mvu $r1,$lo16 */
557 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
|
| lm32-opinst.c | 144 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
220 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| iq2000-opc.c | 252 /* addi ${rt-rs},$lo16 */
255 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
258 /* addi $rt,$rs,$lo16 */
261 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
264 /* addiu ${rt-rs},$lo16 */
267 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
270 /* addiu $rt,$rs,$lo16 */
273 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
312 /* andi ${rt-rs},$lo16 */
315 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } }
[all...] |
| lm32-opc.c | 386 /* ori $r1,$r0,$lo16 */
389 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
554 /* mvu $r1,$lo16 */
557 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
|
| lm32-opinst.c | 144 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
220 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| iq2000-opc.c | 252 /* addi ${rt-rs},$lo16 */
255 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
258 /* addi $rt,$rs,$lo16 */
261 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
264 /* addiu ${rt-rs},$lo16 */
267 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } },
270 /* addiu $rt,$rs,$lo16 */
273 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
312 /* andi ${rt-rs},$lo16 */
315 { { MNEM, ' ', OP (RT_RS), ',', OP (LO16), 0 } }
[all...] |
| lm32-opc.c | 386 /* ori $r1,$r0,$lo16 */
389 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
554 /* mvu $r1,$lo16 */
557 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
|
| lm32-opinst.c | 144 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
220 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 895 MachineInstrBuilder LO16, HI16;
908 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
915 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), DstReg);
925 LO16 = LO16.addImm(SOImmValV1);
927 LO16.cloneMemRefs(MI);
929 LO16.setMIFlags(MIFlags);
931 LO16.addImm(Pred).addReg(PredReg).add(condCodeOp());
934 LO16.add(makeImplicit(MI.getOperand(1)));
935 TransferImpOps(MI, LO16, HI16)
[all...] |
| /src/sys/arch/mips/mips/ |
| kobj_machdep.c | 148 case R_TYPE(LO16): /* AHL + S */
157 DPRINTF(" LO16(%#lx) = 0x%04lx\n", addr, RELOC_LO16(addr));
|
