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    Searched refs:NUM_GFXCLK_DPM_LEVELS (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu9_driver_if.h 39 #define NUM_GFXCLK_DPM_LEVELS 8
48 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
182 PllSetting_t GfxclkLevel [NUM_GFXCLK_DPM_LEVELS];
231 uint8_t CksEnable[NUM_GFXCLK_DPM_LEVELS];
232 uint8_t CksVidOffset[NUM_GFXCLK_DPM_LEVELS];
296 uint8_t StaticVoltageOffsetVid[NUM_GFXCLK_DPM_LEVELS]; /* This values are added on to the final voltage calculation */
317 uint8_t AcgEnable[NUM_GFXCLK_DPM_LEVELS];
322 uint32_t AcgFreqTable[NUM_GFXCLK_DPM_LEVELS];
356 float AvfsGbCksOn[NUM_GFXCLK_DPM_LEVELS];
357 float AcBtcGbCksOn[NUM_GFXCLK_DPM_LEVELS];
    [all...]
smu11_driver_if.h 38 #define NUM_GFXCLK_DPM_LEVELS 16
53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
421 uint16_t FreqTableGfx [NUM_GFXCLK_DPM_LEVELS ];
smu11_driver_if_arcturus.h 36 #define NUM_GFXCLK_DPM_LEVELS 16
46 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
513 uint16_t FreqTableGfx [NUM_GFXCLK_DPM_LEVELS ]; // In MHz
smu11_driver_if_navi10.h 37 #define NUM_GFXCLK_DPM_LEVELS 16
52 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
586 uint16_t FreqTableGfx [NUM_GFXCLK_DPM_LEVELS ]; // In MHz
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/vega12/
smu9_driver_if.h 37 #define NUM_GFXCLK_DPM_LEVELS 16
50 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
309 uint16_t FreqTableGfx [NUM_GFXCLK_DPM_LEVELS ];
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_processpptables.c 318 for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
amdgpu_vega10_hwmgr.c 1691 while (i < NUM_GFXCLK_DPM_LEVELS) {
3089 NUM_GFXCLK_DPM_LEVELS),
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_arcturus_ppt.c 1706 for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
amdgpu_navi10_ppt.c 633 dpm_context->dpm_tables.gfx_table.max = driver_ppt->FreqTableGfx[NUM_GFXCLK_DPM_LEVELS - 1];

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