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    Searched refs:NV_CIO_CRE_RPC1_INDEX (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/
nouveau_dispnv04_tvnv04.c 94 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
102 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
nouveau_dispnv04_dac.c 173 saved_rpc1 = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX);
174 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1 & ~0xc0);
227 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1);
289 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0))
nvreg.h 233 # define NV_CIO_CRE_RPC1_INDEX 0x1a /* repaint control 1 */
nouveau_dispnv04_crtc.c 196 NV_CIO_CRE_RPC1_INDEX) & ~0xC0;
233 NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RPC1_INDEX, crtc1A);
392 regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ?
nouveau_dispnv04_hw.c 642 rd_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);
756 wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);

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