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  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
LatencyPriorityQueue.h 68 unsigned getLatency(unsigned NodeNum) const {
69 assert(NodeNum < (*SUnits).size());
70 return (*SUnits)[NodeNum].getHeight();
73 unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
74 assert(NodeNum < NumNodesSolelyBlocking.size());
75 return NumNodesSolelyBlocking[NodeNum];
ResourcePriorityQueue.h 93 unsigned getLatency(unsigned NodeNum) const {
94 assert(NodeNum < (*SUnits).size());
95 return (*SUnits)[NodeNum].getHeight();
98 unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
99 assert(NodeNum < NumNodesSolelyBlocking.size());
100 return NumNodesSolelyBlocking[NodeNum];
ScheduleDFS.h 146 return DFSNodeData[SU->NodeNum].InstrCount;
159 return ILPValue(DFSNodeData[SU->NodeNum].InstrCount, 1 + SU->getDepth());
172 assert(SU->NodeNum < DFSNodeData.size() && "New Node");
173 return DFSNodeData[SU->NodeNum].SubtreeID;
MachinePipeliner.h 170 for (const auto &NodeNum : Topo)
171 Node2Idx->at(NodeNum) = Idx++;
210 int getASAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ASAP; }
213 int getALAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ALAP; }
225 return ScheduleInfo[Node->NodeNum].ZeroLatencyDepth;
234 return ScheduleInfo[Node->NodeNum].ZeroLatencyHeight;
ScheduleDAG.h 264 unsigned NodeNum = BoundaryID; ///< Entry # of node in the node vector.
308 SUnit(SDNode *node, unsigned nodenum)
309 : Node(node), NodeNum(nodenum), isVRegCycle(false), isCall(false),
319 SUnit(MachineInstr *instr, unsigned nodenum)
320 : Instr(instr), NodeNum(nodenum), isVRegCycle(false), isCall(false),
344 bool isBoundaryNode() const { return NodeNum == BoundaryID; }
MachineScheduler.h 458 return SUPressureDiffs[SU->NodeNum];
461 return SUPressureDiffs[SU->NodeNum];
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIMachineScheduler.cpp 179 NodeNum2Index[SU->NodeNum] = SUnits.size();
186 dbgs() << " SU(" << Cand.SU->NodeNum << ") " << getReasonStr(Cand.Reason);
238 if (TryCand.SU->NodeNum < Cand.SU->NodeNum) {
255 TryCand.IsLowLatency = DAG->IsLowLatencySU[SU->NodeNum];
256 TryCand.LowLatencyOffset = DAG->LowLatencyOffset[SU->NodeNum];
258 HasLowLatencyNonWaitedParent[NodeNum2Index[SU->NodeNum]];
468 if (SuccSU->NodeNum >= DAG->SUnits.size())
493 if (HasLowLatencyNonWaitedParent[NodeNum2Index[SU->NodeNum]])
496 if (DAG->IsLowLatencySU[SU->NodeNum]) {
    [all...]
GCNMinRegStrategy.cpp 40 return NumPreds[SU->NodeNum] == std::numeric_limits<unsigned>::max();
45 NumPreds[SU->NodeNum] = std::numeric_limits<unsigned>::max();
50 assert(NumPreds[SU->NodeNum] != std::numeric_limits<unsigned>::max());
51 return NumPreds[SU->NodeNum];
56 assert(NumPreds[SU->NodeNum] != std::numeric_limits<unsigned>::max());
57 return --NumPreds[SU->NodeNum];
148 LLVM_DEBUG(dbgs() << "SU(" << SU->NodeNum << ") would left non-ready "
159 LLVM_DEBUG(dbgs() << "SU(" << SU->NodeNum << ") would make ready " << Res
170 Num = findMax(Num, [=](const Candidate &C) { return -(int64_t)C.SU->NodeNum; });
201 LLVM_DEBUG(dbgs() << "Make the predecessors of SU(" << SchedSU->NodeNum
    [all...]
GCNILPSched.cpp 59 unsigned &SethiUllmanNumber = SUNumbers[SU->NodeNum];
87 assert(SU->NodeNum < SUNumbers.size());
101 return SUNumbers[SU->NodeNum];
151 LLVM_DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum
152 << ") depth " << LDepth << " vs SU (" << right->NodeNum
171 LLVM_DEBUG(dbgs() << "Depth of SU(" << left->NodeNum << "): "
172 << left->getDepth() << " != SU(" << right->NodeNum
300 SUSavedCopy[SU.NodeNum] = SU;
330 << ' ' << C.SU->NodeNum;
351 SU = SUSavedCopy[SU.NodeNum];
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
ScheduleDAG.cpp 360 dbgs() << "SU(" << SU.NodeNum << ")";
481 int NodeNum = SU.NodeNum;
484 Node2Index[NodeNum] = Degree;
498 if (SU->NodeNum < DAGSize)
499 Allocate(SU->NodeNum, --Id);
502 if (SU->NodeNum < DAGSize && !--Node2Index[SU->NodeNum])
516 assert(Node2Index[SU.NodeNum] > Node2Index[PD.getSUnit()->NodeNum] &
    [all...]
LatencyPriorityQueue.cpp 32 unsigned LHSNum = LHS->NodeNum;
33 unsigned RHSNum = RHS->NodeNum;
81 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking;
ScheduleDAGInstrs.cpp 103 dbgs() << "SU(" << su->NodeNum << ")";
707 if ((*SUItr)->NodeNum <= BarrierChain->NodeNum)
831 PDiffs->addInstruction(SU->NodeNum, RegOpers, MRI);
903 << BarrierChain->NodeNum << ").\n";);
1062 NodeNums.push_back(SU->NodeNum);
1065 NodeNums.push_back(SU->NodeNum);
1069 // the lowest NodeNum of them will become the new BarrierChain to
1078 if (newBarrierChain->NodeNum < BarrierChain->NodeNum) {
    [all...]
MachineScheduler.cpp 619 dbgs() << SU->NodeNum << " ";
1138 LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU.NodeNum << ") "
1173 LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU->NodeNum << ") "
1384 LLVM_DEBUG(dbgs() << "Cyclic Path: SU(" << DefSU->NodeNum << ") -> SU("
1385 << SU->NodeNum << ") = " << CyclicLatency << "c\n");
1531 return SU->NodeNum < RHS.SU->NodeNum;
1610 if (!SUnit2ClusterInfo.count(MemOpRecords[NextIdx].SU->NodeNum) &&
1621 if (SUnit2ClusterInfo.count(MemOpa.SU->NodeNum)) {
1622 ClusterLength = SUnit2ClusterInfo[MemOpa.SU->NodeNum].first + 1
    [all...]
MachinePipeliner.cpp 871 if (SU->NodeNum < I.NodeNum && !I.isPred(SU))
892 if (SU->NodeNum < I.NodeNum && !I.isPred(SU))
1231 int N = SI.getSUnit()->NodeNum;
1245 int N = SI.getSUnit()->NodeNum;
1258 int N = PI.getSUnit()->NodeNum;
1324 if (Blocked.test(W->NodeNum))
1325 unblock(W->NodeNum);
1661 return A->NodeNum > B->NodeNum
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZMachineScheduler.h 85 return (lhs->NodeNum < rhs->NodeNum);
SystemZMachineScheduler.cpp 236 if (SU->NodeNum < other.SU->NodeNum)
243 LLVM_DEBUG(dbgs() << "** Scheduling SU(" << SU->NodeNum << ") ";
SystemZHazardRecognizer.cpp 168 OS << "SU(" << SU->NodeNum << "):";
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCMachineScheduler.cpp 142 if ((Zone->isTop() && TryCand.SU->NodeNum < Cand.SU->NodeNum) ||
143 (!Zone->isTop() && TryCand.SU->NodeNum > Cand.SU->NodeNum)) {
210 if (TryCand.SU->NodeNum < Cand.SU->NodeNum)
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGRRList.cpp 281 if (NewNode->NodeNum >= NumSUnits)
291 if (NewNode->NodeNum >= NumSUnits)
1013 LoadNode->setNodeId(LoadSU->NodeNum);
1032 N->setNodeId(NewSU->NodeNum);
1048 LLVM_DEBUG(dbgs() << "Unfolding SU #" << SU->NodeNum << "\n");
1183 LLVM_DEBUG(dbgs() << " Duplicating SU #" << SU->NodeNum << "\n");
1449 LLVM_DEBUG(dbgs() << " Repushing SU #" << SU->NodeNum << '\n');
1473 dbgs() << " SU #" << CurSU->NodeNum << '\n');
1524 LLVM_DEBUG(dbgs() << "ARTIFICIAL edge from SU(" << BtSU->NodeNum
1525 << ") to SU(" << TrySU->NodeNum << ")\n")
    [all...]
ScheduleDAGFast.cpp 238 LLVM_DEBUG(dbgs() << "Unfolding SU # " << SU->NodeNum << "\n");
252 N->setNodeId(NewSU->NodeNum);
274 LoadNode->setNodeId(LoadSU->NodeNum);
348 LLVM_DEBUG(dbgs() << "Duplicating SU # " << SU->NodeNum << "\n");
595 LLVM_DEBUG(dbgs() << "Adding an edge from SU # " << TrySU->NodeNum
596 << " to SU #" << Copies.front()->NodeNum << "\n");
601 LLVM_DEBUG(dbgs() << "Adding an edge from SU # " << NewDef->NodeNum
602 << " to SU #" << TrySU->NodeNum << "\n");
ResourcePriorityQueue.cpp 190 unsigned LHSNum = LHS->NodeNum;
191 unsigned RHSNum = RHS->NodeNum;
237 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking;
426 ResCount += (NumNodesSolelyBlocking[SU->NodeNum] * ScaleTwo);
SelectionDAGPrinter.cpp 291 O << "SU(" << SU->NodeNum << "): ";
ScheduleDAGSDNodes.cpp 375 N->setNodeId(NodeSUnit->NodeNum);
392 N->setNodeId(NodeSUnit->NodeNum);
415 N->setNodeId(NodeSUnit->NodeNum);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonMachineScheduler.cpp 180 LLVM_DEBUG(dbgs() << Packet[i]->NodeNum << ")\t");
509 dbgstr << "SU(" << std::setw(3) << (*I)->NodeNum << ")";
798 if ((Q.getID() == TopQID && (*I)->NodeNum < Candidate.SU->NodeNum)
799 || (Q.getID() == BotQID && (*I)->NodeNum > Candidate.SU->NodeNum)) {
859 if ((Q.getID() == TopQID && (*I)->NodeNum < Candidate.SU->NodeNum)
860 || (Q.getID() == BotQID && (*I)->NodeNum > Candidate.SU->NodeNum)) {
    [all...]
HexagonSubtarget.cpp 593 if (SrcBest == nullptr || Src->NodeNum >= SrcBest->NodeNum) {
596 if (DstBest == nullptr || Dst->NodeNum <= DstBest->NodeNum)

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