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    Searched refs:O6 (Results 1 - 8 of 8) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcFrameLowering.cpp 52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53 .addReg(SP::O6).addImm(NumBytes);
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
69 .addReg(SP::O6).addReg(SP::G1);
81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
82 .addReg(SP::O6).addReg(SP::G1);
178 // add %o6, BIAS, %g1
180 .addReg(SP::O6).addImm(Bias);
182 regUnbiased = SP::O6;
191 // add %g1, -BIAS, %o6
    [all...]
SparcRegisterInfo.cpp 70 Reserved.set(SP::O6);
SparcISelLowering.cpp 820 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
841 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
875 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
884 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
913 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
1024 .Case("o4", SP::O4).Case("o5", SP::O5).Case("o6", SP::O6).Case("o7", SP::O7)
1170 SDValue StackPtr = DAG.getRegister(SP::O6, PtrVT);
1215 SDValue StackPtr = DAG.getRegister(SP::O6, PtrVT);
1706 setStackPointerRegisterToSaveRestore(SP::O6);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/
SparcMCTargetDesc.cpp 39 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
49 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
  /src/external/bsd/pcc/dist/pcc/arch/sparc64/
order.c 110 static int ret[] = { O0, O1, O2, O3, O4, O5, O6, O7, -1 };
macdefs.h 134 #define O6 13
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp 139 Sparc::O4, Sparc::O5, Sparc::O6, Sparc::O7,
1117 RegNo = Sparc::O6;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/Disassembler/
SparcDisassembler.cpp 64 SP::O4, SP::O5, SP::O6, SP::O7,

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