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    Searched refs:OTG_GLOBAL_CONTROL1 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_optc.c 254 * REG_SET_2(OTG_GLOBAL_CONTROL1, 0,
362 REG_UPDATE(OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_EN, 1);
371 REG_UPDATE_2(OTG_GLOBAL_CONTROL1,
382 REG_UPDATE_2(OTG_GLOBAL_CONTROL1,
391 REG_UPDATE(OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_EN, 0);
dcn20_optc.h 35 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_optc.h 104 uint32_t OTG_GLOBAL_CONTROL1;

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