| /src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| elf.h | 130 /* Align output to a power of two. Note ".align 0" is redundant,
132 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
135 if ((POWER) > 0) \
136 fprintf (STREAM, "\t.align\t%d\n", POWER); \
|
| aout.h | 255 /* Align output to a power of two. Horrible /bin/as. */
257 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
260 int amount = 1 << (POWER); \
|
| /src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| aarch64-elf.h | 95 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
96 fprintf(STREAM, "\t.align\t%d\n", (int)POWER)
|
| /src/sys/arch/luna68k/dev/ |
| lcd.c | 55 #define POWER 0x10
289 p1->portC = POWER | READ_BUSY | ENABLE;
298 p1->portC = POWER | READ_BUSY | DISABLE;
313 p1->portC = POWER | WRITE_DATA | ENABLE;
315 p1->portC = POWER | WRITE_DATA | DISABLE;
330 p1->portC = POWER | WRITE_CMD | ENABLE;
332 p1->portC = POWER | WRITE_CMD | DISABLE;
|
| /src/external/gpl3/gcc.old/dist/gcc/config/moxie/ |
| moxie.h | 195 #define ASM_OUTPUT_ALIGN(STREAM,POWER) \
196 fprintf (STREAM, "\t.p2align\t%d\n", POWER);
282 general-purpose register, a power of two from 1 or 8. */
|
| /src/sys/arch/hpcmips/conf/ |
| TX3912 | 104 # temporally power management
105 hpcapm0 at mainbus0 # power management
131 hpcout* at hpcioman3 iochip 0 evtype POWER id PWCTL_LED port 3 initvalue 0
141 hpcout* at hpcioman4 iochip 0 evtype POWER id PWCTL_LED port 3 initvalue 0
152 hpcout* at hpcioman5 iochip 0 evtype POWER id PWCTL_LCDLIGHT port 14
|
| TX3922 | 99 # temporally power management
100 hpcapm0 at mainbus0 # power management
117 hpcin* at hpcioman1 iochip 1 evtype PMEVENT id PME_AC port 6 edge 1 # AC-power
120 hpcout* at hpcioman1 iochip 1 evtype POWER id PWCTL_LED port 4 flags 3 #(blink)
130 hpcout* at hpcioman2 iochip 1 evtype POWER id PWCTL_COM0 port 15
131 hpcout* at hpcioman2 iochip 1 evtype POWER id PWCTL_LED port 4 flags 3 #(blink)
|
| /src/external/gpl3/gcc.old/dist/gcc/config/avr/ |
| avr.h | 457 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
459 if ((POWER) > 0) \
460 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
|
| /src/external/gpl3/gcc.old/dist/gcc/config/cr16/ |
| cr16.h | 533 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
534 asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
|
| /src/external/gpl3/gcc.old/dist/gcc/config/fr30/ |
| fr30.h | 771 advance the location counter to a multiple of 2 to the POWER bytes. POWER
773 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
774 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
|
| /src/external/gpl3/gcc.old/dist/gcc/config/ft32/ |
| ft32.h | 190 #define ASM_OUTPUT_ALIGN(STREAM,POWER) \
191 fprintf (STREAM, "\t.p2align\t%d\n", POWER);
299 general-purpose register, a power of two from 1 or 8. */
|
| /src/external/gpl3/gcc.old/dist/gcc/config/m32c/ |
| m32c.h | 615 #define ASM_OUTPUT_ALIGN(STREAM,POWER) \
616 fprintf (STREAM, "\t.p2align\t%d\n", POWER);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/mmix/ |
| mmix.h | 146 to high, as the power of two, hence little-endian. */
754 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
755 mmix_asm_output_align (STREAM, POWER)
|
| /src/external/gpl3/gcc.old/dist/gcc/config/nvptx/ |
| nvptx.h | 277 #define ASM_OUTPUT_ALIGN(FILE, POWER) \
281 (void) (POWER); \
|
| /src/external/gpl3/gcc.old/dist/gcc/config/stormy16/ |
| stormy16.h | 465 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
466 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
|
| /src/external/gpl3/gcc.old/dist/gcc/config/csky/ |
| csky.h | 929 /* Align output to a power of two. Note ".align 0" is redundant,
931 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
934 if ((POWER) > 0) \
935 fprintf (STREAM, "\t.align\t%d\n", POWER); \
|
| /src/sys/arch/rs6000/rs6000/ |
| machdep.c | 273 /* hrmm.. there is no timebase crap on POWER */
295 * 1) POWER has no bat registers.
300 #if !defined(POWER)
315 #ifdef POWER
468 /* writing anything to the power/reset reg on an rs6k will cause
|
| /src/sys/arch/hpc/include/ |
| config_hook.h | 143 /* power control type */
195 #define POWER CONFIG_HOOK_POWERCONTROL
200 /* power contorol */
|
| /src/sys/arch/rs6000/stand/boot/ |
| boot.c | 98 #ifdef POWER
|
| /src/external/gpl3/gcc.old/dist/gcc/config/frv/ |
| frv.h | 1761 advance the location counter to a multiple of 2 to the POWER bytes. POWER
1763 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
1764 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
1767 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
1768 fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER))
|
| /src/sys/arch/arm/nxp/ |
| imx6_clk.c | 920 CLK_PLL("pll3", "osc", USB, PLL_USB1, DIV_SELECT, POWER, 0),
924 CLK_PLL("pll7", "osc", USB, PLL_USB2, DIV_SELECT, POWER, 0),
|
| imx6sx_clk.c | 1009 CLK_PLL("pll3", "osc", USB, PLL_USB1, DIV_SELECT, POWER, 0),
1013 CLK_PLL("pll7", "osc", USB, PLL_USB2, DIV_SELECT, POWER, 0),
|
| /src/external/gpl3/gcc.old/dist/gcc/config/ia64/ |
| ia64.h | 1447 advance the location counter to a multiple of 2 to the POWER bytes. */
1449 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
1450 fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 3207 /* The FL1 field in a POWER SC form instruction. */
3213 /* The FL2 field in a POWER SC form instruction. */
3293 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
3655 /* The SV field in a POWER SC form instruction. */
5117 #define POWER PPC_OPCODE_POWER
6496 {"svc", SC(17,0,0), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},
6498 {"svcl", SC(17,0,1), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},
6501 {"svcla", SC(17,1,1), SC_MASK, POWER, PPCVLE, {SV}},
6749 {"rfsvc", XL(19,82), 0xffffffff, POWER, PPCVLE, {0}},
7429 {"clf", X(31,118), XTO_MASK, POWER, 0, {RA, RB}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 3207 /* The FL1 field in a POWER SC form instruction. */
3213 /* The FL2 field in a POWER SC form instruction. */
3293 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
3655 /* The SV field in a POWER SC form instruction. */
5101 #define POWER PPC_OPCODE_POWER
6468 {"svc", SC(17,0,0), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},
6470 {"svcl", SC(17,0,1), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},
6473 {"svcla", SC(17,1,1), SC_MASK, POWER, PPCVLE, {SV}},
6721 {"rfsvc", XL(19,82), 0xffffffff, POWER, PPCVLE, {0}},
7398 {"clf", X(31,118), XTO_MASK, POWER, 0, {RA, RB}}
[all...] |
