HomeSort by: relevance | last modified time | path
    Searched refs:PredCost (Results 1 - 12 of 12) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
R600InstrInfo.h 210 unsigned *PredCost = nullptr) const override;
R600InstrInfo.cpp 989 unsigned *PredCost) const {
990 if (PredCost)
991 *PredCost = 2;
SIInstrInfo.h 1112 unsigned *PredCost = nullptr) const override;
SIInstrInfo.cpp 7820 unsigned *PredCost) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonInstrInfo.h 277 /// PredCost.
280 unsigned *PredCost = nullptr) const override;
HexagonInstrInfo.cpp 1884 unsigned *PredCost) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCInstrInfo.h 313 unsigned *PredCost = nullptr) const override;
PPCInstrInfo.cpp 138 unsigned *PredCost) const {
140 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 2131 unsigned PredCost = (TCycles + FCycles + TExtra + FExtra) * ScalingUpFactor;
2148 // discount it from PredCost.
2149 PredCost -= 1 * ScalingUpFactor;
2158 PredCost += ((TCycles + FCycles - 4) / 4) * ScalingUpFactor;
2169 return PredCost <= UnpredCost;
4706 unsigned *PredCost) const {
4719 Latency += getInstrLatency(ItinData, *I, PredCost);
4725 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) &&
4729 *PredCost = 1;
ARMBaseInstrInfo.h 454 unsigned *PredCost = nullptr) const override;
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetInstrInfo.h 1600 /// PredCost.
1603 unsigned *PredCost = nullptr) const;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetInstrInfo.cpp 1153 unsigned *PredCost) const {

Completed in 42 milliseconds