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    Searched refs:RADEON_PPLL_REF_DIV (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_legacy_crtc.c 229 RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_ATOMIC_UPDATE_R);
237 while (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_ATOMIC_UPDATE_R);
239 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
950 if ((pll_ref_div == (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_REF_DIV_MASK)) &&
987 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
992 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
997 WREG32_PLL_P(RADEON_PPLL_REF_DIV,
radeon_clocks.c 127 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
205 u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);
247 RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
radeon_reg.h 1580 #define RADEON_PPLL_REF_DIV 0x0003 /* PLL */
radeon_combios.c 1161 RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
  /src/sys/dev/pci/
radeonfb.c 1631 PRINTPLL(RADEON_PPLL_REF_DIV);
1673 refdiv = GETPLL(sc, RADEON_PPLL_REF_DIV) &
1683 uint32_t tmp = GETPLL(sc, RADEON_PPLL_REF_DIV);
2115 while (GETPLL(sc, RADEON_PPLL_REF_DIV) &
2117 SETPLL(sc, RADEON_PPLL_REF_DIV, RADEON_PPLL_ATOMIC_UPDATE_W);
2132 if (GETPLL(sc, RADEON_PPLL_REF_DIV) &
2150 refdiv = GETPLL(sc, RADEON_PPLL_REF_DIV);
2177 if ((refdiv == GETPLL(sc, RADEON_PPLL_REF_DIV)) &&
2206 PUTPLL(sc, RADEON_PPLL_REF_DIV, refdiv);
2228 PRINTPLL(RADEON_PPLL_REF_DIV);
    [all...]
radeonfbreg.h 1527 #define RADEON_PPLL_REF_DIV 0x0003 /* PLL */

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