| /src/external/gpl3/gdb/dist/sim/mn10300/ |
| sim-main.h | 25 #define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) /* disable this hook */
29 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
30 mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
|
| mn10300-sim.h | 44 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA)
45 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC)
46 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC)
185 (sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA)))
188 (sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA) + (N)))
198 INLINE_SIM_MAIN (void) do_syscall (SIM_DESC sd); variable
199 void program_interrupt (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, SIM_SIGNAL sig
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/mn10300/ |
| sim-main.h | 25 #define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) /* disable this hook */
29 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
30 mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
|
| mn10300-sim.h | 44 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA)
45 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC)
46 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC)
185 (sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA)))
188 (sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA) + (N)))
198 INLINE_SIM_MAIN (void) do_syscall (SIM_DESC sd); variable
199 void program_interrupt (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, SIM_SIGNAL sig
[all...] |
| /src/external/gpl3/gdb/dist/sim/m32r/ |
| sim-main.h | 26 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
27 m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb.old/dist/sim/m32r/ |
| sim-main.h | 26 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
27 m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb/dist/sim/frv/ |
| sim-main.h | 36 #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
37 frv_sim_engine_halt_hook ((SD), (LAST_CPU), (CIA))
39 #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA)
50 extern void frv_sim_close (SIM_DESC sd, int quitting);
108 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
109 frv_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb.old/dist/sim/frv/ |
| sim-main.h | 36 #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
37 frv_sim_engine_halt_hook ((SD), (LAST_CPU), (CIA))
39 #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA)
50 extern void frv_sim_close (SIM_DESC sd, int quitting);
108 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
109 frv_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb/dist/sim/mips/ |
| sim-main.c | 52 load_memory (SIM_DESC SD,
67 sim_io_printf(sd,"DBG: LoadMemory(%p,%p,%d,%d,0x%s,0x%s,%s)\n",memvalp,memval1p,CCA,AccessLength,pr_addr(pAddr),pr_addr(vAddr),(IorD ? "isDATA" : "isINSTRUCTION"));
72 sim_io_eprintf(sd,"LoadMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
78 sim_io_error (SD, "LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
84 dotrace (SD, CPU, tracefh,((IorD == isDATA) ? 0 : 2),(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"load%s",((IorD == isDATA) ? "" : " instruction"));
169 store_memory (SIM_DESC SD,
180 sim_io_printf(sd,"DBG: StoreMemory(%d,%d,0x%s,0x%s,0x%s,0x%s)\n",CCA,AccessLength,pr_uword64(MemElem),pr_uword64(MemElem1),pr_addr(pAddr),pr_addr(vAddr));
185 sim_io_eprintf(sd,"StoreMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
189 sim_io_error (SD, "STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
194 dotrace (SD, CPU, tracefh,1,(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"store")
[all...] |
| sim-main.h | 23 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
24 mips_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
197 sim_engine_abort (SD, CPU, cia, \
200 sim_io_eprintf (SD, "PENDING_SCHED - 0x%lx - dest 0x%lx, val 0x%lx, bit %d, size %d, pending_in %d, pending_out %d, pending_total %d\n", \
216 #define PENDING_TICK() pending_tick (SD, CPU, cia)
405 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mips_cpu_exception_trigger(SD,CPU,CIA)
406 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mips_cpu_exception_suspend(SD,CPU,EXC)
407 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mips_cpu_exception_resume(SD,CPU,EXC
[all...] |
| m16run.c | 30 #define SD sd
34 sim_engine_run (SIM_DESC sd,
39 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
53 nia = m16_idecode_issue (sd, instruction_0, cia);
58 nia = m32_idecode_issue (sd, instruction_0, cia);
65 if (sim_events_tick (sd))
68 sim_events_process (sd);
|
| /src/external/gpl3/gdb.old/dist/sim/mips/ |
| sim-main.c | 52 load_memory (SIM_DESC SD,
67 sim_io_printf(sd,"DBG: LoadMemory(%p,%p,%d,%d,0x%s,0x%s,%s)\n",memvalp,memval1p,CCA,AccessLength,pr_addr(pAddr),pr_addr(vAddr),(IorD ? "isDATA" : "isINSTRUCTION"));
72 sim_io_eprintf(sd,"LoadMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
78 sim_io_error (SD, "LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
84 dotrace (SD, CPU, tracefh,((IorD == isDATA) ? 0 : 2),(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"load%s",((IorD == isDATA) ? "" : " instruction"));
169 store_memory (SIM_DESC SD,
180 sim_io_printf(sd,"DBG: StoreMemory(%d,%d,0x%s,0x%s,0x%s,0x%s)\n",CCA,AccessLength,pr_uword64(MemElem),pr_uword64(MemElem1),pr_addr(pAddr),pr_addr(vAddr));
185 sim_io_eprintf(sd,"StoreMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
189 sim_io_error (SD, "STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
194 dotrace (SD, CPU, tracefh,1,(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"store")
[all...] |
| sim-main.h | 23 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
24 mips_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
197 sim_engine_abort (SD, CPU, cia, \
200 sim_io_eprintf (SD, "PENDING_SCHED - 0x%lx - dest 0x%lx, val 0x%lx, bit %d, size %d, pending_in %d, pending_out %d, pending_total %d\n", \
216 #define PENDING_TICK() pending_tick (SD, CPU, cia)
405 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mips_cpu_exception_trigger(SD,CPU,CIA)
406 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mips_cpu_exception_suspend(SD,CPU,EXC)
407 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mips_cpu_exception_resume(SD,CPU,EXC
[all...] |
| m16run.c | 30 #define SD sd
34 sim_engine_run (SIM_DESC sd,
39 sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
53 nia = m16_idecode_issue (sd, instruction_0, cia);
58 nia = m32_idecode_issue (sd, instruction_0, cia);
65 if (sim_events_tick (sd))
68 sim_events_process (sd);
|
| /src/external/gpl3/gdb/dist/sim/iq2000/ |
| sim-main.h | 43 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
44 iq2000_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb.old/dist/sim/iq2000/ |
| sim-main.h | 43 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
44 iq2000_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb/dist/sim/common/ |
| sim-engine.h | 56 void sim_engine_get_run_state (SIM_DESC sd, enum sim_stop *reason, int *sigrc);
57 void sim_engine_set_run_state (SIM_DESC sd, enum sim_stop reason, int sigrc);
63 (SIM_DESC sd,
74 #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
88 (SIM_DESC sd,
97 #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA)
105 This function is NULL safe. It can be called when either of SD or
117 (SIM_DESC sd,
124 (SIM_DESC sd,
[all...] |
| sim-trace.h | 224 #define STATE_TRACE_FLAGS(sd) TRACE_FLAGS (STATE_TRACE_DATA (sd))
228 #define STRACE_P(sd,idx) \
229 (WITH_TRACE_P (idx) && STATE_TRACE_FLAGS (sd)[idx] != 0)
231 /* Non-zero if --trace-<xxxx> was specified for SD. */
232 #define STRACE_ANY_P(sd) (WITH_TRACE_ANY_P && (STATE_TRACE_DATA (sd)->trace_any_p))
233 #define STRACE_INSN_P(sd) STRACE_P (sd, TRACE_INSN_IDX)
234 #define STRACE_DISASM_P(sd) STRACE_P (sd, TRACE_DISASM_IDX
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/common/ |
| sim-engine.h | 56 void sim_engine_get_run_state (SIM_DESC sd, enum sim_stop *reason, int *sigrc);
57 void sim_engine_set_run_state (SIM_DESC sd, enum sim_stop reason, int sigrc);
63 (SIM_DESC sd,
74 #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
88 (SIM_DESC sd,
97 #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA)
105 This function is NULL safe. It can be called when either of SD or
117 (SIM_DESC sd,
124 (SIM_DESC sd,
[all...] |
| sim-trace.h | 224 #define STATE_TRACE_FLAGS(sd) TRACE_FLAGS (STATE_TRACE_DATA (sd))
228 #define STRACE_P(sd,idx) \
229 (WITH_TRACE_P (idx) && STATE_TRACE_FLAGS (sd)[idx] != 0)
231 /* Non-zero if --trace-<xxxx> was specified for SD. */
232 #define STRACE_ANY_P(sd) (WITH_TRACE_ANY_P && (STATE_TRACE_DATA (sd)->trace_any_p))
233 #define STRACE_INSN_P(sd) STRACE_P (sd, TRACE_INSN_IDX)
234 #define STRACE_DISASM_P(sd) STRACE_P (sd, TRACE_DISASM_IDX
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
| SymbolManager.cpp | 161 SymExpr *SD = DataSet.FindNodeOrInsertPos(profile, InsertPos);
162 if (!SD) {
163 SD = (SymExpr*) BPAlloc.Allocate<SymbolRegionValue>();
164 new (SD) SymbolRegionValue(SymbolCounter, R);
165 DataSet.InsertNode(SD, InsertPos);
169 return cast<SymbolRegionValue>(SD);
180 SymExpr *SD = DataSet.FindNodeOrInsertPos(profile, InsertPos);
181 if (!SD) {
182 SD = (SymExpr*) BPAlloc.Allocate<SymbolConjured>();
183 new (SD) SymbolConjured(SymbolCounter, E, LCtx, T, Count, SymbolTag)
[all...] |
| /src/external/gpl3/gdb/dist/sim/lm32/ |
| sim-main.h | 57 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
58 lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/gpl3/gdb.old/dist/sim/lm32/ |
| sim-main.h | 57 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
58 lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 119 MachineInstr *EmitDbgValue(SDDbgValue *SD,
124 MachineInstr *EmitDbgInstrRef(SDDbgValue *SD,
128 MachineInstr *EmitDbgLabel(SDDbgLabel *SD);
|
| /src/external/gpl3/gdb/dist/sim/cris/ |
| cris-sim.h | 101 #define cris_trace_printf(SD, CPU, FMT...) \
104 if (TRACE_FILE (STATE_TRACE_DATA (SD)) != NULL) \
107 sim_io_printf (SD, FMT); \
|
