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Searched refs:SDMA0_STATUS_REG__SEM_IDLE__SHIFT (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_0_sh_mask.h	`511 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
sdma0_4_1_sh_mask.h	`510 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
sdma0_4_2_2_sh_mask.h	`517 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
sdma0_4_2_sh_mask.h	`511 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h	`956 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
oss_2_4_sh_mask.h	`1040 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
oss_3_0_1_sh_mask.h	`1058 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
oss_3_0_sh_mask.h	`1564 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h	`219 #define SDMA0_STATUS_REG__SEM_IDLE__SHIFT 0x1a [all...]`

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