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    Searched refs:SDWA (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIPeepholeSDWA.cpp 1 //===- SIPeepholeSDWA.cpp - Peephole optimization for SDWA instructions ---===//
9 /// \file This pass tries to apply several peephole SDWA patterns.
31 #define DEBUG_TYPE "si-peephole-sdwa"
33 STATISTIC(NumSDWAPatternsFound, "Number of SDWA patterns found.");
35 "Number of instruction converted to SDWA.");
73 StringRef getPassName() const override { return "SI Peephole SDWA"; }
112 using namespace AMDGPU::SDWA;
187 INITIALIZE_PASS(SIPeepholeSDWA, DEBUG_TYPE, "SI Peephole SDWA", false, false)
223 OS << "SDWA src: " << *getTargetOperand()
231 OS << "SDWA dst: " << *getTargetOperand(
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SIDefines.h 41 SDWA = 1 << 14,
186 // Operand for SDWA instructions
248 SDWA = 2,
637 namespace SDWA {
670 } // namespace SDWA
AMDGPUInstructionSelector.cpp 1888 .addImm(AMDGPU::SDWA::WORD_1) // $dst_sel
1889 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused
1890 .addImm(AMDGPU::SDWA::WORD_0) // $src0_sel
2807 assert(STI.hasSDWA() && "no target has VOP3P but not SDWA");
2870 .addImm(AMDGPU::SDWA::WORD_1) // $dst_sel
2871 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused
2872 .addImm(AMDGPU::SDWA::WORD_0) // $src0_sel
2888 .addImm(AMDGPU::SDWA::WORD_0) // $dst_sel
2889 .addImm(AMDGPU::SDWA::UNUSED_PRESERVE) // $dst_unused
2890 .addImm(AMDGPU::SDWA::WORD_1) // $src0_se
    [all...]
SIInstrInfo.h 436 return MI.getDesc().TSFlags & SIInstrFlags::SDWA;
440 return get(Opcode).TSFlags & SIInstrFlags::SDWA;
SIInstrInfo.cpp 850 .addImm(DstLow ? AMDGPU::SDWA::SdwaSel::WORD_0
851 : AMDGPU::SDWA::SdwaSel::WORD_1)
852 .addImm(AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE)
853 .addImm(SrcLow ? AMDGPU::SDWA::SdwaSel::WORD_0
854 : AMDGPU::SDWA::SdwaSel::WORD_1)
3836 // Verify SDWA
3839 ErrInfo = "SDWA is not supported on this target";
3855 ErrInfo = "Only VGPRs allowed as operands in SDWA instructions on VI";
3862 "Only reg allowed as operands in SDWA instructions on GFX9+";
3873 ErrInfo = "OMod not allowed in SDWA instructions on VI"
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
SIMCCodeEmitter.cpp 405 using namespace AMDGPU::SDWA;
435 using namespace AMDGPU::SDWA;
AMDGPUInstPrinter.cpp 376 } else if (Flags & SIInstrFlags::SDWA) {
937 using namespace llvm::AMDGPU::SDWA;
948 default: llvm_unreachable("Invalid SDWA data select operand");
976 using namespace llvm::AMDGPU::SDWA;
984 default: llvm_unreachable("Invalid SDWA dest_unused operand");
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3059 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) )
3073 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) {
3084 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP
3103 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA,
3124 return "sdwa";
3246 SIInstrFlags::SDWA)) {
3530 // but sdwa is handled differently. See isSDWAOperand.
3537 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc))
3785 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA;
3799 if (IsRevOpcode(Opcode) || (Desc.TSFlags & SIInstrFlags::SDWA))
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 429 // Try to decode DPP and SDWA first to solve conflict with VOP1 and VOP2
1363 using namespace AMDGPU::SDWA;
1411 using namespace AMDGPU::SDWA;

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