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    Searched refs:SETUO (Results 1 - 23 of 23) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1351 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelDAGToDAG.cpp 81 case ISD::SETUO:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
Analysis.cpp 200 case FCmpInst::FCMP_UNO: return ISD::SETUO;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 446 case ISD::SETUO: return "setuo";
TargetLowering.cpp 359 case ISD::SETUO:
4167 if (Cond == ISD::SETO || Cond == ISD::SETUO)
4215 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
4217 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
8677 ISD::CondCode::SETUO);
8706 return DAG.getSelectCC(dl, Src, Src, ZeroInt, Select, ISD::CondCode::SETUO);
8826 case ISD::SETUO:
8846 // If the SETUO or SETO CC isn't legal, we might be able to use
8850 CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO;
8875 CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO
    [all...]
SelectionDAG.cpp 539 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
2229 case ISD::SETUO:
2318 case ISD::SETUO: return getBoolConstant(R==APFloat::cmpUnordered, dl, VT,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIWholeQuadMode.cpp 824 case ISD::SETUO:
R600ISelLowering.cpp 99 setCondCodeAction(ISD::SETUO, MVT::f32, Expand);
AMDGPUISelLowering.cpp 1401 case ISD::SETUO:
SIISelLowering.cpp 9123 // and (fcmp setuo), (fp_class x, mask) -> fp_class x, mask & (p_nan | n_nan)
9125 if ((LCC == ISD::SETO || LCC == ISD::SETUO) && Mask &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 859 case ISD::SETUO:
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 557 case ISD::SETUO:
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 104 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 4134 case ISD::SETUO: return PPC::PRED_UN;
4154 case ISD::SETUO: return 3; // Bit #3 = SETUO
PPCISelLowering.cpp 610 setCondCodeAction(ISD::SETUO, MVT::f32, Expand);
611 setCondCodeAction(ISD::SETUO, MVT::f64, Expand);
933 setCondCodeAction(ISD::SETUO, MVT::v4f32, Expand);
986 setCondCodeAction(ISD::SETUO, MVT::v2f64, Expand);
7842 default: break; // SETUO etc aren't handled by fsel.
7877 default: break; // SETUO etc aren't handled by fsel.
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 1859 Op->getOperand(2), ISD::SETUO);
MipsISelLowering.cpp 620 case ISD::SETUO: return Mips::FCOND_UN;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 1401 case ISD::SETUO: return SPCC::FCC_U;
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 301 ISD::SETGE, ISD::SETNE, ISD::SETO, ISD::SETUO};
547 ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUO,
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2049 case ISD::SETUO: return SystemZ::CCMASK_CMP_UO;
2853 case ISD::SETUO:
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 5099 case ISD::SETUO: return X86::COND_P;
21635 dl, Src, Src, ZeroInt, FpToInt, ISD::CondCode::SETUO);
21674 dl, Src, Src, ZeroInt, Select, ISD::CondCode::SETUO);
22720 case ISD::SETUO: SSECC = 3; break;
22745 case ISD::SETUO:
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 2283 case ISD::SETUO:
2354 case ISD::SETUO:
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1967 case ISD::SETUO: CondCode = ARMCC::VS; break;
6517 case ISD::SETUO: Invert = true; LLVM_FALLTHROUGH;

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