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    Searched refs:SPI_PS_IN_CONTROL_0 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770d.h 532 #define SPI_PS_IN_CONTROL_0 0x286CC
evergreend.h 1028 #define SPI_PS_IN_CONTROL_0 0x286CC
r600d.h 453 #define SPI_PS_IN_CONTROL_0 0x286CC
radeon_rv770.c 1586 WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));
radeon_r600.c 2377 WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));

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