| /src/external/gpl2/gettext/dist/gettext-tools/gnulib-lib/ |
| quotearg.c | 179 If BUFFERSIZE is too small to store the output string, return the
200 #define STORE(c) \
212 STORE ('"');
248 STORE (*quote_string);
256 STORE ('\'');
274 STORE ('\\');
282 STORE ('\\');
283 STORE ('0');
284 STORE ('0');
306 STORE ('?')
[all...] |
| /src/external/gpl2/grep/dist/lib/ |
| quotearg.c | 200 If BUFFERSIZE is too small to store the output string, return the
221 #define STORE(c) \
233 STORE ('"');
264 STORE (*quote_string);
272 STORE ('\'');
290 STORE ('\\');
312 STORE ('?');
313 STORE ('\\');
314 STORE ('?');
370 STORE ('\'');
[all...] |
| /src/external/gpl2/xcvs/dist/lib/ |
| quotearg.c | 182 If BUFFERSIZE is too small to store the output string, return the
203 #define STORE(c) \
215 STORE ('"');
251 STORE (*quote_string);
259 STORE ('\'');
277 STORE ('\\');
285 STORE ('\\');
286 STORE ('0');
287 STORE ('0');
309 STORE ('?')
[all...] |
| /src/external/bsd/libarchive/dist/libarchive/test/ |
| test_read_format_cab.c | 172 STORE = 0,
203 if (comp != STORE) {
257 if (comp != STORE) {
301 if (comp != STORE) {
324 if (comp != STORE) {
361 if (comp != STORE) {
379 if (comp != STORE) {
397 verify("test_read_format_cab_1.cab", STORE);
398 verify2("test_read_format_cab_1.cab", STORE);
399 verify3("test_read_format_cab_1.cab", STORE);
[all...] |
| /src/external/gpl3/binutils/dist/bfd/ |
| coff-sh.c | 702 a load or store instruction is not aligned on a four byte boundary,
705 align load and store instructions on four byte boundaries if we
1003 /* Look for load and store instructions that we can align on four
1548 #define STORE (0x2)
1654 { 0x0004, STORE | USES1 | USES2 | USESR0 }, /* mov.b rm,@(r0,rn) */
1655 { 0x0005, STORE | USES1 | USES2 | USESR0 }, /* mov.w rm,@(r0,rn) */
1656 { 0x0006, STORE | USES1 | USES2 | USESR0 }, /* mov.l rm,@(r0,rn) */
1673 { 0x1000, STORE | USES1 | USES2 } /* mov.l rm,@(disp,rn) */
1683 { 0x2000, STORE | USES1 | USES2 }, /* mov.b rm,@rn */
1684 { 0x2001, STORE | USES1 | USES2 }, /* mov.w rm,@rn *
[all...] |
| /src/external/gpl3/binutils.old/dist/bfd/ |
| coff-sh.c | 702 a load or store instruction is not aligned on a four byte boundary,
705 align load and store instructions on four byte boundaries if we
1004 /* Look for load and store instructions that we can align on four
1550 #define STORE (0x2)
1656 { 0x0004, STORE | USES1 | USES2 | USESR0 }, /* mov.b rm,@(r0,rn) */
1657 { 0x0005, STORE | USES1 | USES2 | USESR0 }, /* mov.w rm,@(r0,rn) */
1658 { 0x0006, STORE | USES1 | USES2 | USESR0 }, /* mov.l rm,@(r0,rn) */
1675 { 0x1000, STORE | USES1 | USES2 } /* mov.l rm,@(disp,rn) */
1685 { 0x2000, STORE | USES1 | USES2 }, /* mov.b rm,@rn */
1686 { 0x2001, STORE | USES1 | USES2 }, /* mov.w rm,@rn *
[all...] |
| /src/lib/libc/citrus/modules/ |
| citrus_zw.c | 158 #define STORE \
176 STORE;
196 STORE;
211 STORE;
223 STORE;
237 STORE;
|
| /src/tests/lib/libc/sys/ |
| t_futex_ops.c | 55 #define STORE(x, y) *(volatile int *)(x) = (y)
272 STORE(&futex_word, 0);
273 STORE(&futex_word1, 0);
288 STORE(d->futex_ptr, 1);
294 STORE(d->error_ptr, errno);
297 STORE(d->error_ptr, 0);
305 STORE(d->futex_ptr, 2);
317 STORE(d->error_ptr, errno);
320 STORE(d->futex_ptr, 4);
352 STORE(error_ptr, -1)
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| aarch64-simd-builtins.def | 96 BUILTIN_VALLDIF (STORESTRUCT, st1x2, 0, STORE)
97 BUILTIN_VSDQ_I_DI (STORESTRUCT_U, st1x2, 0, STORE)
98 BUILTIN_VALLP (STORESTRUCT_P, st1x2, 0, STORE)
100 BUILTIN_VALLDIF (STORESTRUCT, st1x3, 0, STORE)
101 BUILTIN_VSDQ_I_DI (STORESTRUCT_U, st1x3, 0, STORE)
102 BUILTIN_VALLP (STORESTRUCT_P, st1x3, 0, STORE)
104 BUILTIN_VALLDIF (STORESTRUCT, st1x4, 0, STORE)
105 BUILTIN_VSDQ_I_DI (STORESTRUCT_U, st1x4, 0, STORE)
106 BUILTIN_VALLP (STORESTRUCT_P, st1x4, 0, STORE)
120 BUILTIN_VALLDIF (STORESTRUCT, st2, 0, STORE)
[all...] |
| aarch64-builtins.cc | 405 /* The first argument (return type) of a store should be void type,
407 a DImode pointer to the location to store to, so we must use
1619 /* Add builtins for Load/store 64 Byte instructions. */
2287 /* Function to expand an expression EXP which calls one of the Load/Store
2831 VAR1 (STORE1, st1, 0, STORE, v8qi)
2834 VAR1 (STORE1, st1, 0, STORE, v16qi)
2837 VAR1 (STORE1, st1, 0, STORE, v4hi)
2840 VAR1 (STORE1, st1, 0, STORE, v8hi)
2843 VAR1 (STORE1, st1, 0, STORE, v2si)
2846 VAR1 (STORE1, st1, 0, STORE, v4si
[all...] |
| /src/lib/libcrypt/ |
| crypt.c | 74 * define "MUST_ALIGN" if your compiler cannot load/store
119 * representation is to store one bit per byte in an array of bytes. Bit N of
260 #define STORE(s,s0,s1,bl) (bl).b32.i0 = s0, (bl).b32.i1 = s1
316 STORE(D,D0,D1,*out);
721 STORE(K&~0x03030303L, K0&~0x03030303L, K1, *help);
724 STORE(K,K0,K1,*help);
727 STORE(K&~0x03030303L, K0&~0x03030303L, K1, *help);
735 * schedule, and store the resulting 8 chars at "out" (in == out is permitted).
776 STORE(L,L0,L1,B);
838 /* store the encrypted (or decrypted) result *
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SIMemoryLegalizer.cpp | 44 STORE = 1u << 1,
45 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ STORE)
244 /// \returns Store info if \p MI is a store operation, "None" otherwise.
292 /// Update \p MI memory store instruction to bypass any caches up to
515 /// Expands store operation \p MI. Returns true if instructions are
847 // Only handle load and store, not atomic read-modify-write insructions. The
852 // Only update load and store, not LLVM IR atomic read-modify-write
856 assert( Op == SIMemOp::LOAD || Op == SIMemOp::STORE);
876 // Request L1 MISS_EVICT and L2 STREAM for load and store instructions
[all...] |
| AMDGPUISelLowering.cpp | 37 // Find a larger type to do a load / store of a vector with.
43 assert(StoreSize % 32 == 0 && "Store size not a multiple of 32");
64 // Lower floating point store/load to integer store/load to reduce the number
186 setOperationAction(ISD::STORE, MVT::f32, Promote);
187 AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32);
189 setOperationAction(ISD::STORE, MVT::v2f32, Promote);
190 AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32);
192 setOperationAction(ISD::STORE, MVT::v3f32, Promote);
193 AddPromotedToType(ISD::STORE, MVT::v3f32, MVT::v3i32)
[all...] |
| /src/sys/external/bsd/sljit/dist/sljit_src/ |
| sljitNativeARM_64.c | 779 #define STORE 0x01
934 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
1394 if (getput_arg_fast(compiler, flags | STORE, dst_r, dst, dstw))
1397 return getput_arg(compiler, flags | STORE, dst_r, dst, dstw, 0, 0);
1430 if (getput_arg_fast(compiler, mem_flags | STORE, dst_r, dst, dstw))
1433 return getput_arg(compiler, mem_flags | STORE, dst_r, dst, dstw, 0, 0);
1465 if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, mem_flags | STORE | ARG_TEST, TMP_REG1, dst, dstw))
1514 getput_arg_fast(compiler, mem_flags | STORE, dst_r, dst, dstw);
1517 return getput_arg(compiler, mem_flags | STORE, TMP_REG1, dst, dstw, 0, 0);
1567 if (!(flags & STORE))
[all...] |
| sljitNativeARM_T2_32.c | 797 #define STORE 0x01
821 s = store
1023 return push_inst16(compiler, STR_SP | ((flags & STORE) ? 0 : 0x800) | RDN3(reg) | (argw >> 2));
1311 return emit_op_mem(compiler, flags | STORE, dst_r, dst, dstw, (dst_r == TMP_REG1) ? TMP_REG2 : TMP_REG1);
1337 return emit_op_mem(compiler, flags | STORE, dst_r, dst, dstw, TMP_REG2);
1382 return emit_op_mem(compiler, WORD_SIZE | STORE, dst_reg, dst, dstw, TMP_REG2);
1488 /* Store the integer value from a VFP register. */
1652 return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, TMP_REG1);
1840 return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, TMP_REG2);
1879 FAIL_IF(emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, TMP_REG2))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRISelDAGToDAG.cpp | 320 template <> bool AVRDAGToDAGISel::select<ISD::STORE>(SDNode *N) {
541 case ISD::STORE: return select<ISD::STORE>(N);
|
| /src/sys/arch/riscv/riscv/ |
| db_machdep.c | 164 return OPCODE_P(insn, STORE) || OPCODE_P(insn, STOREFP);
|
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_generichash/blake2b/ref/ |
| blake2b-compress-avx2.h | 12 #define STORE(p, r) _mm256_store_si256((__m256i *) (p), r)
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 291 /// flag, because it may be a store to memory, etc.). If the type of the
299 /// indicates if an overflow occurred (*not* a flag, because it may be store
907 /// LOAD and STORE have token chains as their first operand, then the same
908 /// operands as an LLVM load/store instruction, then an offset node that
912 STORE,
1103 /// This corresponds to "store atomic" instruction.
1140 // Masked load and store - consecutive vector load and store operations
1149 // Masked gather and scatter - load and store operations for a vector of
1263 /// MemIndexedMode enum - This enum defines the load / store indexe
[all...] |
| SelectionDAGNodes.h | 466 // Except for GCC; by default, AIX compilers store bit-fields in 4-byte words
1306 /// store occurs.
1348 case ISD::STORE:
1364 N->getOpcode() == ISD::STORE ||
1415 /// when store does not occur.
2232 /// Return the addressing mode for this load or store:
2238 /// Return true if this is a pre/post inc/dec load/store.
2241 /// Return true if this is NOT a pre/post inc/dec load/store.
2246 N->getOpcode() == ISD::STORE;
2260 assert(!writeMem() && "Load MachineMemOperand is a store!");
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 75 /// Used on Mips Load/Store instructions
297 case ISD::STORE:
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGAddressAnalysis.cpp | 101 // One example of unknown size memory access is to load/store scalable
221 case ISD::STORE: {
|
| /src/external/gpl3/binutils/dist/include/opcode/ |
| arc.h | 83 STORE,
|
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| arc.h | 83 STORE,
|
| /src/usr.bin/make/unit-tests/ |
| varmod.mk | 125 .if ${VAR:P=RE} != "STORE"
|
