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Searched refs:VID_UPPER_GPIO_CNTL (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
rv6xxd.h	`118 #define VID_UPPER_GPIO_CNTL 0x740`
radeon_rv6xx_dpm.c	`739 WREG32_P(VID_UPPER_GPIO_CNTL, MEDIUM_BACKBIAS_VALUE, ~MEDIUM_BACKBIAS_VALUE); 741 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~MEDIUM_BACKBIAS_VALUE); 744 WREG32_P(VID_UPPER_GPIO_CNTL, HIGH_BACKBIAS_VALUE, ~HIGH_BACKBIAS_VALUE); 746 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~HIGH_BACKBIAS_VALUE); 781 WREG32_P(VID_UPPER_GPIO_CNTL, LOW_BACKBIAS_VALUE, ~LOW_BACKBIAS_VALUE); 783 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~LOW_BACKBIAS_VALUE);`
radeon_r600_dpm.c	`543 tmp = RREG32(VID_UPPER_GPIO_CNTL); 545 WREG32(VID_UPPER_GPIO_CNTL, tmp);`
r600d.h	`1421 #define VID_UPPER_GPIO_CNTL 0x740`

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