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    Searched refs:VLV_WM_LEVEL_PM5 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display_types.h 686 VLV_WM_LEVEL_PM5,
  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 1625 dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12;
1839 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id],
2176 if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5))
2187 if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5))
6068 wm->level = VLV_WM_LEVEL_PM5;
6088 dev_priv->wm.max_level = VLV_WM_LEVEL_PM5;

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