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    Searched refs:WB_ENABLE (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_dwb.c 83 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1);
96 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0);
dcn10_dwb.h 56 SRI(WB_ENABLE, CNV, inst),\
89 SF(CNV0_WB_ENABLE, WB_ENABLE, mask_sh),\
153 type WB_ENABLE;\
219 uint32_t WB_ENABLE;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dwb.c 122 /* Set WB_ENABLE (not double buffered; capture not enabled) */
123 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1);
149 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0);
209 REG_GET(WB_ENABLE, WB_ENABLE, &wb_enabled);
dcn20_dwb.h 60 SRI2(WB_ENABLE, CNV, inst),\
108 SF(WB_ENABLE, WB_ENABLE, mask_sh),\
232 type WB_ENABLE;\
360 uint32_t WB_ENABLE;

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