| /src/sys/arch/aarch64/aarch64/ |
| cpufunc.c | 46 u_int arm_dcache_align; /* compat arm */ variable in typeref:typename:u_int
191 arm_dcache_align = sizeof(int) << arm_dcache_maxline;
192 arm_dcache_align_mask = arm_dcache_align - 1;
196 if (coherency_unit < arm_dcache_align)
198 coherency_unit, arm_dcache_align);
|
| /src/sys/arch/arm/ixp12x0/ |
| ixp12x0_pci.c | 109 arm_dcache_align);
|
| /src/sys/arch/aarch64/include/ |
| cpufunc.h | 119 extern u_int arm_dcache_align;
|
| /src/sys/arch/arm/xscale/ |
| i80312_pci.c | 119 pci_configure_bus(pc, pcires, sbus, arm_dcache_align);
|
| i80321_pci.c | 128 pci_configure_bus(pc, pcires, busno, arm_dcache_align);
|
| ixp425_pci.c | 102 arm_dcache_align);
|
| becc_pci.c | 137 pci_configure_bus(pc, pcires, 0, arm_dcache_align);
|
| /src/sys/arch/evbarm/ifpga/ |
| ifpga.c | 308 arm_dcache_align);
|
| /src/sys/arch/arm/nxp/ |
| imx6_pcie.c | 239 int error = pci_configure_bus(&sc->sc_pc, pcires, 0, arm_dcache_align);
|
| /src/sys/arch/arm/arm/ |
| cpufunc.c | 117 u_int arm_dcache_align; variable in typeref:typename:u_int
1431 arm_dcache_align = arm_pcache.dcache_line_size;
1435 if (arm_scache.dcache_line_size < arm_dcache_align)
1436 arm_dcache_align = arm_scache.dcache_line_size;
1509 arm_dcache_align = arm_pcache.dcache_line_size;
1517 KASSERTMSG(arm_dcache_align <= CACHE_LINE_SIZE,
1518 "arm_dcache_align=%u CACHE_LINE_SIZE=%u",
1519 arm_dcache_align, CACHE_LINE_SIZE);
1520 arm_dcache_align_mask = arm_dcache_align - 1;
1590 arm_dcache_align = arm_pcache.dcache_line_size
[all...] |
| /src/sys/arch/evbarm/marvell/ |
| marvell_machdep.c | 586 "cache-line-size", arm_dcache_align);
831 "cache-line-size", arm_dcache_align);
|
| /src/sys/arch/arm/gemini/ |
| gemini_pci.c | 212 pci_configure_bus(pc, pcires, 0, arm_dcache_align);
|
| /src/sys/arch/arm/include/ |
| cpufunc.h | 426 extern u_int arm_dcache_align;
|
| /src/sys/arch/evbarm/armadaxp/ |
| armadaxp_machdep.c | 587 "cache-line-size", arm_dcache_align);
|
| /src/sys/arch/arm/broadcom/ |
| bcm53xx_eth.c | 1062 bus_dmamap_sync(sc->sc_dmat, map, 0, arm_dcache_align,
1491 misalignment = mtod(mext, vaddr_t) & arm_dcache_align;
1509 if (((oldoff ^ off) & arm_dcache_align) != 0 || off < oldoff) {
|
| /src/sys/arch/arm/s3c2xx0/ |
| s3c2800_pci.c | 307 pci_configure_bus(&sspci_chipset, pcires, 0, arm_dcache_align);
|
| /src/sys/arch/arm/fdt/ |
| pcihost_fdt.c | 60 #define PCIHOST_CACHELINE_SIZE arm_dcache_align
|
| /src/sys/arch/arm/nvidia/ |
| tegra_pcie.c | 252 arm_dcache_align);
|
| /src/sys/arch/arm/arm32/ |
| bus_dma.c | 893 const size_t line_size = arm_dcache_align;
|
