| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_mqd_manager_v10.c | 189 m->cp_hqd_pq_doorbell_control =
192 pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
193 m->cp_hqd_pq_doorbell_control);
220 m->cp_hqd_pq_doorbell_control |=
|
| kfd_mqd_manager_v9.c | 226 m->cp_hqd_pq_doorbell_control =
229 pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
230 m->cp_hqd_pq_doorbell_control);
259 m->cp_hqd_pq_doorbell_control |= 1 <<
|
| kfd_mqd_manager_cik.c | 215 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off);
338 m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off);
|
| kfd_mqd_manager_vi.c | 196 m->cp_hqd_pq_doorbell_control =
199 pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
200 m->cp_hqd_pq_doorbell_control);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cik_structs.h | 96 uint32_t cp_hqd_pq_doorbell_control; member in struct:cik_mqd
|
| vi_structs.h | 305 uint32_t cp_hqd_pq_doorbell_control; member in struct:vi_mqd
|
| v9_structs.h | 305 uint32_t cp_hqd_pq_doorbell_control; member in struct:v9_mqd
|
| v10_structs.h | 822 uint32_t cp_hqd_pq_doorbell_control; member in struct:v10_compute_mqd
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v7_0.c | 2860 u32 cp_hqd_pq_doorbell_control; member in struct:hqd_registers
2954 mqd->cp_hqd_pq_doorbell_control =
2957 mqd->cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
2959 mqd->cp_hqd_pq_doorbell_control &= ~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
3009 mqd->cp_hqd_pq_doorbell_control =
3011 mqd->cp_hqd_pq_doorbell_control &=
3013 mqd->cp_hqd_pq_doorbell_control |=
3016 mqd->cp_hqd_pq_doorbell_control |=
3018 mqd->cp_hqd_pq_doorbell_control &=
3023 mqd->cp_hqd_pq_doorbell_control = 0
[all...] |
| amdgpu_amdkfd_gfx_v10.c | 286 data = REG_SET_FIELD(m->cp_hqd_pq_doorbell_control,
287 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
|
| amdgpu_amdkfd_gfx_v7.c | 266 data = REG_SET_FIELD(m->cp_hqd_pq_doorbell_control,
267 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
|
| amdgpu_amdkfd_gfx_v8.c | 253 data = REG_SET_FIELD(m->cp_hqd_pq_doorbell_control,
254 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
|
| amdgpu_amdkfd_gfx_v9.c | 276 data = REG_SET_FIELD(m->cp_hqd_pq_doorbell_control,
277 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
|
| amdgpu_gfx_v10_0.c | 3252 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3254 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3256 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3258 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3261 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3265 mqd->cp_hqd_pq_doorbell_control = tmp;
3318 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3321 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3323 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3325 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
[all...] |
| amdgpu_gfx_v9_0.c | 3360 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3362 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3364 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3366 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3369 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3373 mqd->cp_hqd_pq_doorbell_control = tmp;
3426 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3429 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3431 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
3433 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
[all...] |
| amdgpu_gfx_v8_0.c | 4463 CP_HQD_PQ_DOORBELL_CONTROL,
4467 mqd->cp_hqd_pq_doorbell_control = tmp;
4513 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
4516 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
4518 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
4520 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
4524 mqd->cp_hqd_pq_doorbell_control = tmp;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cik.c | 4476 u32 cp_hqd_pq_doorbell_control; member in struct:hqd_registers
4642 mqd->queue_state.cp_hqd_pq_doorbell_control =
4643 RREG32(CP_HQD_PQ_DOORBELL_CONTROL);
4645 mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN;
4647 mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_EN;
4648 WREG32(CP_HQD_PQ_DOORBELL_CONTROL,
4649 mqd->queue_state.cp_hqd_pq_doorbell_control);
4728 mqd->queue_state.cp_hqd_pq_doorbell_control =
4729 RREG32(CP_HQD_PQ_DOORBELL_CONTROL);
4730 mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_OFFSET_MASK
[all...] |
