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    Searched refs:dml_floor (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_dml_common_defs.c 40 double floor = dml_floor(a, 1);
dml_inline_defs.h 75 static inline double dml_floor(double a, double granularity) function in typeref:typename:double
amdgpu_dml1_display_rq_dlg_calc.c 141 double prefill = dml_floor(vinit, 1);
182 double prefill = dml_floor(vinit, 1);
509 log2_dpte_row_height_linear = dml_floor(
836 log2_dpte_row_height_linear = dml_floor(
1340 dst_y_prefetch = dml_floor(4.0 * (dst_y_prefetch + 0.125), 1) / 4;
1452 dst_y_per_vm_vblank = dml_floor(4.0 * (dst_y_per_vm_vblank + 0.125), 1) / 4.0;
1456 dst_y_per_row_vblank = dml_floor(4.0 * (dst_y_per_row_vblank + 0.125), 1) / 4.0;
1680 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(
1683 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(
1719 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c 203 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_l.dpte_row_height),
208 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height),
597 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries
1499 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l,
1501 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l,
1506 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1508 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c,
amdgpu_display_rq_dlg_calc_20v2.c 203 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_l.dpte_row_height),
208 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height),
597 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries
1500 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l,
1502 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l,
1507 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c,
1509 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c,
amdgpu_display_mode_vba_20.c 548 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / HTotal, 1);
639 *DestinationLinesForPrefetch = dml_floor(4.0 * (*DestinationLinesForPrefetch + 0.125), 1)
704 *DestinationLinesToRequestVMInVBlank = dml_floor(
708 *DestinationLinesToRequestRowInVBlank = dml_floor(
809 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
831 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
833 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1048 << (unsigned int) dml_floor(
1538 mode_lib->vba.LinesInDETYRoundedDownToSwath[k] = dml_floor(
1550 mode_lib->vba.LinesInDETCRoundedDownToSwath[k] = dml_floor(
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amdgpu_display_mode_vba_20v2.c 540 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / HTotal, 1);
699 *DestinationLinesForPrefetch = dml_floor(4.0 * (*DestinationLinesForPrefetch + 0.125), 1)
764 *DestinationLinesToRequestVMInVBlank = dml_floor(
768 *DestinationLinesToRequestRowInVBlank = dml_floor(
869 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
891 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
893 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1108 << (unsigned int) dml_floor(
1574 mode_lib->vba.LinesInDETYRoundedDownToSwath[k] = dml_floor(
1586 mode_lib->vba.LinesInDETCRoundedDownToSwath[k] = dml_floor(
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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c 181 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(
187 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(
595 log2_dpte_row_height_linear = dml_floor(
1599 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(
1601 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(
1606 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(
1608 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(
amdgpu_display_mode_vba_21.c 757 *DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
842 dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;
1069 return VCOSpeed * 4 / dml_floor(VCOSpeed * 4 / Clock, 1);
1225 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1419 1 << (unsigned int) dml_floor(
2639 dml_floor(
2705 locals->LinesInDETYRoundedDownToSwath[k] = dml_floor(
3315 return dml_floor(16 * DecimalBPP, 1) / 16.0;
3333 return dml_floor(16 * DecimalBPP, 1) / 16.0
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