| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ | 
| amdgpu_dml1_display_rq_dlg_calc.c | 1061 	double dst_y_prefetch;  local in function:dml1_rq_dlg_get_dlg_params 1335 	dst_y_prefetch = ((double) min_vblank - 1.0)
 1337 	DTRACE("DLG: %s: dst_y_prefetch (before rnd) = %3.2f", __func__, dst_y_prefetch);
 1338 	ASSERT(dst_y_prefetch >= 2.0);
 1340 	dst_y_prefetch = dml_floor(4.0 * (dst_y_prefetch + 0.125), 1) / 4;
 1341 	DTRACE("DLG: %s: dst_y_prefetch (after rnd) = %3.2f", __func__, dst_y_prefetch);
 1343 	t_pre_us = dst_y_prefetch * line_time_in_us
 [all...]
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| amdgpu_display_rq_dlg_helpers.c | 222 			"DML_RQ_DLG_CALC:    dst_y_prefetch                  = 0x%0x\n", 223 			dlg_regs.dst_y_prefetch);
 
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| display_mode_structs.h | 426 	unsigned int dst_y_prefetch;  member in struct:_vcs_dpi_display_dlg_regs_st 
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| display_mode_vba.h | 74 dml_get_pipe_attr_decl(dst_y_prefetch); 
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| amdgpu_display_mode_vba.c | 133 dml_get_pipe_attr_func(dst_y_prefetch, mode_lib->vba.DestinationLinesForPrefetch); 
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ | 
| amdgpu_display_rq_dlg_calc_20.c | 863 	double dst_y_prefetch;  local in function:dml20_rq_dlg_get_dlg_params 1090 	dst_y_prefetch = get_dst_y_prefetch(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
 1091 	dml_print("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, dst_y_prefetch);
 1120 	ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank));
 1121 	lsw = dst_y_prefetch - (dst_y_per_vm_vblank + dst_y_per_row_vblank);
 1408 	disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2));
 
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| amdgpu_display_rq_dlg_calc_20v2.c | 863 	double dst_y_prefetch;  local in function:dml20v2_rq_dlg_get_dlg_params 1091 	dst_y_prefetch = get_dst_y_prefetch(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
 1092 	dml_print("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, dst_y_prefetch);
 1121 	ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank));
 1122 	lsw = dst_y_prefetch - (dst_y_per_vm_vblank + dst_y_per_row_vblank);
 1409 	disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2));
 
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ | 
| amdgpu_display_rq_dlg_calc_21.c | 909 	double dst_y_prefetch;  local in function:dml_rq_dlg_get_dlg_params 1138 	dst_y_prefetch = get_dst_y_prefetch(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
 1139 	dml_print("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, dst_y_prefetch);
 1172 	ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank));
 1173 	lsw = dst_y_prefetch - (dst_y_per_vm_vblank + dst_y_per_row_vblank);
 1481 	disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2));
 
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ | 
| amdgpu_dcn10_hubp.c | 690 		DST_Y_PREFETCH, dlg_attr->dst_y_prefetch, 891 			DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch,
 895 			DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch,
 
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| amdgpu_dcn10_hw_sequencer_debug.c | 267 				dlg_regs->dst_y_prefetch, dlg_regs->dst_y_per_vm_vblank, dlg_regs->dst_y_per_row_vblank, 
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| amdgpu_dcn10_hw_sequencer.c | 234 				dlg_regs->dst_y_prefetch, dlg_regs->dst_y_per_vm_vblank, dlg_regs->dst_y_per_row_vblank, 1732 			"dst_y_prefetch: %d, \n"
 1748 			pipe_ctx->dlg_regs.dst_y_prefetch,
 
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ | 
| amdgpu_dcn20_hubp.c | 255 			DST_Y_PREFETCH, dlg_attr->dst_y_prefetch, 1083 			DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch,
 1087 			DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch,
 
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| amdgpu_dcn20_hwseq.c | 1264 		if (old_dlg_attr.dst_y_prefetch != new_dlg_attr->dst_y_prefetch || 1282 			old_dlg_attr.dst_y_prefetch = new_dlg_attr->dst_y_prefetch;
 
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