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    Searched refs:emitIntExt (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsFastISel.cpp 187 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
188 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
971 ZExtCondReg = emitIntExt(MVT::i1, CondReg, MVT::i32, true);
1055 if (!emitIntExt(MVT::i1, CondReg, MVT::i32, ZExtCondReg, true))
1211 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1219 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1758 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
1823 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1894 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1908 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 231 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1186 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt);
1275 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt);
2350 SrcReg = emitIntExt(VT, SrcReg, MVT::i32, /*isZExt=*/true);
2856 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed);
3023 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
3033 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
3830 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
4037 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4140 return emitIntExt(SrcVT, Op0, RetVT, IsZExt)
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