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    Searched refs:feature_id (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_hwmgr.c 1119 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id =
1121 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].feature_id =
1124 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id =
1126 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].feature_id =
1131 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ1].feature_id =
1133 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE1].feature_id =
1135 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id =
1137 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE2].feature_id =
1139 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id =
1141 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE3].feature_id
    [all...]
vega20_hwmgr.h 426 uint32_t feature_id; member in struct:vega20_od8_single_setting
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_vega20_ppt.c 1095 if (od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id &&
1096 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].feature_id) {
1107 if (od8_settings->od8_settings_array[OD8_SETTING_UCLK_FMAX].feature_id) {
1116 if (od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ1].feature_id &&
1117 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].feature_id &&
1118 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id &&
1119 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE1].feature_id &&
1120 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE2].feature_id &&
1121 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE3].feature_id) {
1139 if (od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id &
    [all...]
amdgpu_smu.c 398 enum smu_feature_mask feature_id = 0; local in function:smu_clk_dpm_is_enabled
403 feature_id = SMU_FEATURE_DPM_UCLK_BIT;
407 feature_id = SMU_FEATURE_DPM_GFXCLK_BIT;
410 feature_id = SMU_FEATURE_DPM_SOCCLK_BIT;
416 if(!smu_feature_is_enabled(smu, feature_id)) {
682 int feature_id; local in function:smu_feature_is_enabled
688 feature_id = smu_feature_get_index(smu, mask);
689 if (feature_id < 0)
692 WARN_ON(feature_id > feature->feature_num);
695 ret = test_bit(feature_id, feature->enabled)
705 int feature_id; local in function:smu_feature_set_enabled
721 int feature_id; local in function:smu_feature_is_supported
742 int feature_id; local in function:smu_feature_set_supported
    [all...]
vega20_ppt.h 162 uint32_t feature_id; member in struct:vega20_od8_single_setting
  /src/sys/external/bsd/ena-com/
ena_com.c 890 enum ena_admin_aq_feature_id feature_id)
892 u32 feature_mask = 1 << feature_id;
895 if ((feature_id != ENA_ADMIN_DEVICE_ATTRIBUTES) &&
904 enum ena_admin_aq_feature_id feature_id,
912 if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) {
913 ena_trc_dbg("Feature %d isn't supported\n", feature_id);
938 get_cmd.feat_common.feature_id = feature_id;
950 feature_id, ret);
957 enum ena_admin_aq_feature_id feature_id)
    [all...]
ena_admin_defs.h 459 uint8_t feature_id; member in struct:ena_admin_get_set_feature_common_desc
  /src/sys/external/bsd/ena-com/ena_defs/
ena_admin_defs.h 460 uint8_t feature_id; member in struct:ena_admin_get_set_feature_common_desc

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