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    Searched refs:hasAltivec (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 167 if (Subtarget.hasAltivec()) {
190 if (Subtarget.hasAltivec())
197 if (Subtarget.hasAltivec())
205 if (Subtarget.hasAltivec() &&
214 if (Subtarget.hasAltivec())
219 if (Subtarget.hasAltivec())
236 if (Subtarget.hasAltivec()) {
246 ? ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI())
249 : ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI())
255 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR64_ColdCC_Altivec_RegMas
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PPCSubtarget.h 100 bool HasAltivec;
263 bool hasAltivec() const { return HasAltivec; }
PPCTargetTransformInfo.cpp 881 return TypeSize::getFixed(ST->hasAltivec() ? 128 : 0);
1129 bool IsAltivecType = ST->hasAltivec() &&
PPCLoopInstrFormPrep.cpp 832 if (ST && ST->hasAltivec() &&
PPCISelLowering.cpp 714 if (Subtarget.hasAltivec()) {
873 // With hasAltivec set, we can lower ISD::ROTL to vrl(b|h|w).
874 if (Subtarget.hasAltivec())
1285 if (Subtarget.hasAltivec()) {
1549 if (Subtarget.hasAltivec())
12666 (VT == MVT::v4f32 && Subtarget.hasAltivec()) ||
12685 (VT == MVT::v4f32 && Subtarget.hasAltivec()) ||
14935 ((Subtarget.hasAltivec() && ISD::isNON_EXTLoad(N) &&
15049 Perm = Subtarget.hasAltivec()
15637 if (Subtarget.hasAltivec())
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