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Searched refs:ixCG_DISPLAY_GAP_CNTL2 (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_d.h	`712 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
smu_7_0_1_d.h	`1203 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
smu_7_1_0_d.h	`1232 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
smu_7_1_1_d.h	`996 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
smu_7_1_2_d.h	`1157 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
smu_7_1_3_d.h	`1059 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c	`4106 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL2, display_gap2);`

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