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    Searched refs:mmDCPG_INTERRUPT_CONTROL_3 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_2_1_0_offset.h	526 #define mmDCPG_INTERRUPT_CONTROL_3 0x00b1     [all...]
dcn_2_0_0_offset.h	564 #define mmDCPG_INTERRUPT_CONTROL_3 0x00b1     [all...]

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