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Searched refs:mmSDMA0_UTCL1_WATERMK (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h	`136 #define mmSDMA0_UTCL1_WATERMK 0x003d`
sdma0_4_0_offset.h	`138 #define mmSDMA0_UTCL1_WATERMK 0x003d`
sdma0_4_2_2_offset.h	`138 #define mmSDMA0_UTCL1_WATERMK 0x003d`
sdma0_4_2_offset.h	`138 #define mmSDMA0_UTCL1_WATERMK 0x003d`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v4_0.c	`107 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000), 149 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000) 265 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x03fbe1fe)`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`110 #define mmSDMA0_UTCL1_WATERMK 0x003d [all...]`

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