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Searched refs:mmVCE_RB_BASE_LO (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vce/
vce_1_0_d.h	`42 #define mmVCE_RB_BASE_LO 0x8060`
vce_2_0_d.h	`43 #define mmVCE_RB_BASE_LO 0x8060`
vce_3_0_d.h	`43 #define mmVCE_RB_BASE_LO 0x8060`
vce_4_0_offset.h	`82 #define mmVCE_RB_BASE_LO 0x0a60`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vce_v2_0.c	`251 WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);`
amdgpu_vce_v4_0.c	`240 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO), 351 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO), ring->gpu_addr);`
amdgpu_vce_v3_0.c	`288 WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);`

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