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    Searched refs:optimal (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 1347 struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
1435 const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal; local in function:g4x_compute_intermediate_wm
1440 const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal;
1444 *intermediate = *optimal;
1451 intermediate->cxsr = optimal->cxsr && active->cxsr &&
1453 intermediate->hpll_en = optimal->hpll_en && active->hpll_en &&
1455 intermediate->fbc_en = optimal->fbc_en && active->fbc_en;
1459 max(optimal->wm.plane[plane_id],
1466 intermediate->sr.plane = max(optimal->sr.plane
2073 const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; local in function:vlv_compute_intermediate_wm
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  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display_types.h 731 * Optimal watermarks, programmed post-vblank
734 struct intel_pipe_wm optimal; member in struct:intel_crtc_wm_state::__anonde7c4d45070a::__anonde7c4d450808
739 struct skl_pipe_wm optimal; member in struct:intel_crtc_wm_state::__anonde7c4d45070a::__anonde7c4d450908
750 /* optimal watermarks (inverted) */
751 struct vlv_wm_state optimal; member in struct:intel_crtc_wm_state::__anonde7c4d45070a::__anonde7c4d450a08
761 /* optimal watermarks */
762 struct g4x_wm_state optimal; member in struct:intel_crtc_wm_state::__anonde7c4d45070a::__anonde7c4d450b08
769 * safe intermediate watermarks to the optimal final
intel_display.c 876 * Check if the calculated PLL configuration is more optimal compared to the
2283 * something and try to run the system in a "less than optimal"
6490 * optimal watermarks. For gen9+ platforms, the values we program here
13781 sw_wm = &new_crtc_state->wm.skl.optimal;
15433 * optimal watermarks on platforms that need two-step watermark

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