| /src/sys/dev/goldfish/ |
| gfpic.c | 77 gfpic_enable(struct gfpic_softc *sc, int pirq)
79 KASSERT(pirq >= 0);
80 KASSERT(pirq <= 31);
82 REG_WRITE(sc, GFPIC_ENABLE, (1U << pirq));
90 gfpic_disable(struct gfpic_softc *sc, int pirq)
92 KASSERT(pirq >= 0);
93 KASSERT(pirq <= 31);
95 REG_WRITE(sc, GFPIC_DISABLE, (1U << pirq));
|
| /src/sys/arch/alpha/pci/ |
| pci_2100_a50.c | 89 int device, pirq; local in function:ALPHA_PCI_INTR_INIT
92 pirq = 0; /* XXX gcc -Wuninitialized */
109 pirq = 3;
117 pirq = 0;
120 pirq = 2;
123 pirq = 1;
137 pirq = 1;
140 pirq = 0;
143 pirq = 2;
157 pirq = 2
[all...] |
| pci_axppci_33.c | 89 int device, pirq; local in function:ALPHA_PCI_INTR_INIT
92 pirq = 0; /* XXX gcc -Wuninitialized */
109 pirq = 3;
116 pirq = 0;
119 pirq = 2;
122 pirq = 1;
136 pirq = 1;
139 pirq = 0;
142 pirq = 2;
156 pirq = 2
[all...] |
| sio_pic.c | 554 sio_pirq_intr_map(pci_chipset_tag_t pc, int pirq, pci_intr_handle_t *ihp)
556 KASSERT(pirq >= 0 && pirq <= 3);
562 const pcireg_t pirqreg = PIRQ_RTCTRL_PIRQx(rtctrl, pirq);
572 printf("sio_pirq_intr_map: pirq %d -> ISA irq %d, rtctl = 0x%08x\n",
573 pirq, irq, rtctrl);
|
| /src/sys/arch/i386/pci/ |
| pci_intr_fixup.h | 42 #define pciintr_icu_get_intr(t, h, pirq, irqp) \
43 (*(t)->pi_get_intr)((h), (pirq), (irqp))
44 #define pciintr_icu_set_intr(t, h, pirq, irq) \
45 (*(t)->pi_set_intr)((h), (pirq), (irq))
|
| via8231.c | 124 #define VIA8231_GET_TRIGGER_CNFG(reg, pirq) \
129 #define VIA8231_GET_ROUTING_CNFG(reg, pirq) \
130 (((reg) >> via8231_routing_cnfg[(pirq)].shft) & \
131 via8231_routing_cnfg[(pirq)].mask)
133 #define VIA8231_SET_ROUTING_CNFG(reg, pirq, cfg) \
134 (((reg) & ~(via8231_routing_cnfg[(pirq)].mask << \
135 via8231_routing_cnfg[(pirq)].shft)) | \
136 (((cfg) & via8231_routing_cnfg[(pirq)].mask) << \
137 via8231_routing_cnfg[(pirq)].shft))
|
| via82c586.c | 101 #define VP3_TRIGGER(reg, pirq) (((reg) >> vp3_cfg_trigger_shift[(pirq)]) & \
114 #define VP3_PIRQ(reg, pirq) (((reg) >> vp3_cfg_intr_shift[(pirq)]) & \
|
| /src/sys/arch/xen/include/ |
| evtchn.h | 64 int pirq; member in struct:pintrhand
|
| /src/sys/arch/virt68k/virt68k/ |
| intr.c | 182 int pirq; local in function:intr_register_pic
187 for (pirq = 0; pirq < NIRQ_PER_PIC; pirq++) {
188 intr_evcnt[base + pirq].ev_group = device_xname(dev);
189 evcnt_attach_static(&intr_evcnt[base + pirq]);
276 int pirq; local in function:intr_dispatch
291 while ((pirq = gfpic_pending(pics[pic])) >= 0) {
292 LIST_FOREACH(ih, &intrhands[base + pirq], ih_link) {
|
| /src/sys/arch/xen/x86/ |
| pintr.c | 189 map_irq.pirq = -1;
204 aprint_debug(" pirq(s)");
206 msi_i->mp_xen_pirq[i] = map_irq.pirq + i;
234 map_irq.pirq = -1;
245 map_irq.pirq = -1;
252 msi_i->mp_xen_pirq[i] = map_irq.pirq;
263 unmap_irq.pirq = msi_i->mp_xen_pirq[i];
279 unmap_irq.pirq = msi_i->mp_xen_pirq[i];
291 * MSIs, pirq == irq. In the case of everything else, the hypervisor
|
| xen_intr.c | 173 #if (NPCI > 0 || NISA > 0) && defined(XENPV) /* XXX: support PVHVM pirq */
266 int pirq = pih->pirq; local in function:xen_intr_disestablish
268 KASSERT(irq2port[pirq] != 0);
277 * We can safely unbind the pirq now.
280 port = unbind_pirq_from_evtch(pirq);
282 irq2port[pirq] = 0;
|
| /src/sys/arch/xen/xen/ |
| evtchn.c | 117 /* event-channel <-> PIRQ mapping */
119 /* PIRQ needing notify */
249 /* No PIRQ -> event mappings. */
651 get_pirq_to_evtch(int pirq)
655 if (pirq == -1) /* Match previous behaviour */
658 if (pirq >= NR_PIRQS) {
659 panic("pirq %d out of bound, increase NR_PIRQS", pirq);
663 evtchn = pirq_to_evtch[pirq];
671 bind_pirq_to_evtch(int pirq)
[all...] |
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| physdev.h | 52 * array indexed by Xen's PIRQ value.
60 * Xen's PIRQ value.
166 int pirq; member in struct:physdev_map_pirq
183 int pirq; member in struct:physdev_unmap_pirq
258 * the hypercall returns a free pirq */
264 uint32_t pirq; member in struct:physdev_get_free_pirq
348 * Notify that some PIRQ-bound event channels have been unmasked.
|
| event_channel.h | 149 * EVTCHNOP_bind_pirq: Bind a local event channel to a real IRQ (PIRQ <irq>).
156 uint32_t pirq; member in struct:evtchn_bind_pirq
227 uint32_t pirq; /* EVTCHNSTAT_pirq */ member in union:evtchn_status::__anon0e0c2f8b010a
|
| domctl.h | 400 uint8_t pirq; member in struct:xen_domctl_irq_permission
646 * VIRQ_DOM_EXC. (In most systems that pirq is owned by xenstored.)
|
