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    Searched refs:plane_id (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_sprite.h 35 enum pipe pipe, enum plane_id plane_id);
37 static inline bool icl_is_nv12_y_plane(enum plane_id id)
52 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
intel_sprite.c 304 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id)
307 icl_hdr_plane_mask() & BIT(plane_id);
447 enum plane_id plane_id = plane->id; local in function:icl_program_input_csc
534 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), ROFF(csc[0]) |
536 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1), BOFF(csc[2]));
537 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2), ROFF(csc[3]) |
539 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3), BOFF(csc[5]));
540 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4), ROFF(csc[6])
565 enum plane_id plane_id = plane->id; local in function:skl_program_plane
673 enum plane_id plane_id = plane->id; local in function:skl_disable_plane
696 enum plane_id plane_id = plane->id; local in function:skl_plane_get_hw_state
730 enum plane_id plane_id = plane->id; local in function:chv_update_csc
790 enum plane_id plane_id = plane->id; local in function:vlv_update_clrc
993 enum plane_id plane_id = plane->id; local in function:vlv_update_gamma
1019 enum plane_id plane_id = plane->id; local in function:vlv_update_plane
1081 enum plane_id plane_id = plane->id; local in function:vlv_disable_plane
1098 enum plane_id plane_id = plane->id; local in function:vlv_plane_get_hw_state
    [all...]
intel_atomic_plane.c 330 enum plane_id plane_id = plane->id; local in function:skl_next_plane_to_commit
333 !(*update_mask & BIT(plane_id)))
336 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id],
338 I915_MAX_PLANES, plane_id) ||
339 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
341 I915_MAX_PLANES, plane_id))
344 *update_mask &= ~BIT(plane_id);
345 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id];
    [all...]
intel_bw.c 322 enum plane_id plane_id; local in function:intel_bw_crtc_data_rate
324 for_each_plane_id_on_crtc(crtc, plane_id) {
329 if (plane_id == PLANE_CURSOR)
332 data_rate += crtc_state->data_rate[plane_id];
intel_display.h 194 enum plane_id { enum
intel_display_types.h 1008 /* bitmask of visible planes (enum plane_id) */
1113 enum plane_id id;
intel_display.c 10287 enum plane_id plane_id = plane->id; local in function:skl_get_initial_plane_config
10310 val = I915_READ(PLANE_CTL(pipe, plane_id));
10318 alpha = I915_READ(PLANE_COLOR_CTL(pipe, plane_id));
10382 base = I915_READ(PLANE_SURF(pipe, plane_id)) & 0xfffff000;
10385 offset = I915_READ(PLANE_OFFSET(pipe, plane_id));
10387 val = I915_READ(PLANE_SIZE(pipe, plane_id));
10391 val = I915_READ(PLANE_STRIDE(pipe, plane_id));
  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 1079 static int g4x_plane_fifo_size(enum plane_id plane_id, int level)
1095 switch (plane_id) {
1103 MISSING_CASE(plane_id);
1183 int level, enum plane_id plane_id, u16 value)
1191 dirty |= raw->plane[plane_id] != value;
1192 raw->plane[plane_id] = value;
1227 enum plane_id plane_id = plane->id local in function:g4x_raw_plane_wm_compute
1321 enum plane_id plane_id; local in function:g4x_invalidate_wms
1354 enum plane_id plane_id; local in function:g4x_compute_pipe_wm
1441 enum plane_id plane_id; local in function:g4x_compute_intermediate_wm
1687 enum plane_id plane_id; local in function:vlv_compute_fifo
1764 enum plane_id plane_id; local in function:vlv_invalidate_wms
1808 enum plane_id plane_id = plane->id; local in function:vlv_raw_plane_wm_compute
1879 enum plane_id plane_id; local in function:vlv_compute_pipe_wm
2093 enum plane_id plane_id; local in function:vlv_compute_intermediate_wm
4087 enum plane_id plane_id; local in function:skl_pipe_ddb_get_hw_state
4217 enum plane_id plane_id = plane->id; local in function:skl_get_total_relative_data_rate
4247 enum plane_id plane_id = plane->id; local in function:icl_get_total_relative_data_rate
4295 enum plane_id plane_id; local in function:skl_allocate_pipe_ddb
4978 enum plane_id plane_id = plane->id; local in function:skl_build_plane_wm
5002 enum plane_id plane_id = to_intel_plane(plane_state->uapi.plane)->id; local in function:icl_build_plane_wm
5097 enum plane_id plane_id = plane->id; local in function:skl_write_plane_wm
5133 enum plane_id plane_id = plane->id; local in function:skl_write_cursor_wm
5178 enum plane_id plane_id; local in function:skl_pipe_wm_equals
5222 enum plane_id plane_id = plane->id; local in function:skl_ddb_add_affected_planes
5293 enum plane_id plane_id = plane->id; local in function:skl_print_wm_changes
5310 enum plane_id plane_id = plane->id; local in function:skl_print_wm_changes
5495 enum plane_id plane_id = plane->id; local in function:skl_wm_add_affected_planes
5697 enum plane_id plane_id; local in function:skl_pipe_wm_get_hw_state
5924 enum plane_id plane_id; local in function:g4x_wm_get_hw_state
6011 enum plane_id plane_id = plane->id; local in function:g4x_wm_sanitize
6105 enum plane_id plane_id; local in function:vlv_wm_get_hw_state
6169 enum plane_id plane_id = plane->id; local in function:vlv_wm_sanitize
    [all...]
i915_reg.h 6692 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \
6693 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
6694 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \
6695 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
6697 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)
6698 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)
6699 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE
    [all...]
i915_debugfs.c 2888 enum plane_id plane_id; local in function:i915_ddb_info
2892 for_each_plane_id_on_crtc(crtc, plane_id) {
2893 entry = &crtc_state->wm.skl.plane_ddb_y[plane_id];
2894 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
i915_drv.h 1396 #define INTEL_FRONTBUFFER(pipe, plane_id) ({ \
1399 BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe)); \
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
dmabuf.c 271 int plane_id)
279 if (plane_id == DRM_PLANE_TYPE_PRIMARY) {
309 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
331 gvt_vgpu_err("invalid plane id:%d\n", plane_id);
handlers.c 807 enum plane_id plane = REG_50080_TO_PLANE(offset);
  /src/sys/external/bsd/drm2/dist/include/uapi/drm/
drm_mode.h 278 __u32 plane_id; member in struct:drm_mode_set_plane
297 __u32 plane_id; member in struct:drm_mode_get_plane
i915_drm.h 1506 __u32 plane_id; member in struct:drm_intel_sprite_colorkey
  /src/sys/external/bsd/drm2/dist/drm/
drm_plane.c 527 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id);
547 plane_resp->plane_id = plane->base.id;
811 plane = drm_plane_find(dev, file_priv, plane_req->plane_id);
814 plane_req->plane_id);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer.c 644 int plane_id)
650 hws->funcs.dpp_pg_control(hws, plane_id, true);
651 hws->funcs.hubp_pg_control(hws, plane_id, true);
655 "Un-gated front end for pipe %d\n", plane_id);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm.c 2610 struct amdgpu_mode_info *mode_info, int plane_id,
2631 possible_crtcs = 1 << plane_id;
2632 if (plane_id >= dm->dc->caps.max_streams)
2644 mode_info->planes[plane_id] = plane;

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