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    Searched refs:rxdctl (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/dev/pci/igc/
if_igc.c 3516 uint32_t rxdctl = IGC_READ_REG(hw, IGC_RXDCTL(iq)); local
3517 rxdctl |= IGC_RXDCTL_QUEUE_ENABLE;
3518 rxdctl &= 0xFFF00000;
3519 rxdctl |= IGC_RX_PTHRESH;
3520 rxdctl |= IGC_RX_HTHRESH << 8;
3521 rxdctl |= IGC_RX_WTHRESH << 16;
3522 IGC_WRITE_REG(hw, IGC_RXDCTL(iq), rxdctl);
  /src/sys/dev/pci/ixgbe/
ixv.c 1902 u32 reg, rxdctl; local
1906 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1907 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1908 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1940 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1941 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
ixgbe.c 2524 * On 82599 and later, the VLAN enable is per/queue in RXDCTL.
4057 u32 rxdctl, rxctrl; local
4162 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
4169 rxdctl &= ~0x3FFFFF;
4170 rxdctl |= 0x080420;
4172 rxdctl |= IXGBE_RXDCTL_ENABLE;
4173 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
6181 PRINTQS(sc, RXDCTL);

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