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    Searched refs:settings (Results 1 - 21 of 21) sorted by relevancy

  /src/sys/compat/common/
if_spppsubr50.c 129 struct spppkeepalivesettings50 *settings = local
133 settings->maxalive = sp->pp_maxalive;
134 settings->max_noreceive = (uint32_t)sp->pp_max_noreceive;
140 struct spppkeepalivesettings50 *settings = local
144 sp->pp_maxalive = settings->maxalive;
145 sp->pp_max_noreceive = (time_t)settings->max_noreceive;
  /src/sys/dev/acpi/
nxpiic_acpi.c 96 struct motoi2c_settings settings; local
133 settings.i2c_adr = MOTOI2C_ADR_DEFAULT;
134 settings.i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT;
139 settings.i2c_fdr = nxpiic_clk_div[n].ibc;
145 motoi2c_attach(sc, &settings);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_link.c 883 // For seamless boot, to skip verify link cap, we read UEFI settings and set them as verified.
1509 /* get link settings for video mode timing */
1588 struct ext_hdmi_settings *settings)
1599 * Get retimer settings from sbios for passing SI eye test for DCE11
1604 // Check if current bios contains ext Hdmi settings
1608 settings->slv_addr = integrated_info->dp0_ext_hdmi_slv_addr;
1609 settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num;
1610 settings->reg_num_6g = integrated_info->dp0_ext_hdmi_6g_reg_num;
1611 memmove(settings->reg_settings,
1614 memmove(settings->reg_settings_6g
2077 struct ext_hdmi_settings settings = {0}; local
3102 struct ext_hdmi_settings settings = {0}; local
    [all...]
  /src/sys/dev/i2c/
motoi2c.c 85 const struct motoi2c_settings *settings)
87 if (settings == NULL) {
90 sc->sc_settings = *settings;
  /src/sys/arch/sandpoint/
README 101 settings for, say, bootp/tftp boot, automatic boot, and persistent
102 settings (for console rate, auto boot, bootp, etc), and that might
  /src/sys/dev/usb/
if_upgtvar.h 180 uint8_t settings; member in struct:upgt_eeprom_freq4_header
302 uint8_t settings; member in struct:upgt_lmac_channel
if_upgt.c 1187 int i, j, elements, settings, flags; local
1195 settings = freq4_header->settings;
1198 sc->sc_eeprom_freq6_settings = freq4_header->settings;
1202 DPRINTF(2, "%s: settings=%d\n", device_xname(sc->sc_dev), settings);
1210 for (j = 0; j < settings; j++) {
2125 chan->settings = sc->sc_eeprom_freq6_settings;
  /src/sys/external/isc/atheros_hal/dist/ar5416/
ar9285_attach.c 368 ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
375 switch (settings) {
388 /* Restore original chainmask settings */
ar9280_attach.c 695 ar9280SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
702 switch (settings) {
715 /* Restore original chainmask settings */
ar5416_misc.c 36 * and is unaffected by regulatory/country code settings.
107 ar5416SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
  /src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211_misc.c 137 * and is unaffected by regulatory/country code settings.
604 ar5211SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
610 AH5211(ah)->ah_diversityControl = settings;
613 return ar5211SetAntennaSwitchInternal(ah, settings, chan);
ar5211_reset.c 1164 ar5211SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings,
1199 switch (settings) {
1210 __func__, settings);
1213 ahp->ah_diversityControl = settings;
  /src/sys/external/isc/atheros_hal/dist/ar5210/
ar5210_misc.c 125 * and is unaffected by regulatory/country code settings.
299 ar5210SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
302 return (settings == HAL_ANT_VARIABLE);
  /src/sys/netbt/
hci.h 313 /* Link policy settings */
941 uint16_t settings; /* link policy settings */ member in struct:__anon7200
948 uint16_t settings; /* link policy settings */ member in struct:__anon7201
961 uint16_t settings; /* link policy settings */ member in struct:__anon7203
967 uint16_t settings; /* link policy settings */ member in struct:__anon7204
1258 uint16_t settings; /* voice settings * member in struct:__anon7238
1264 uint16_t settings; \/* voice settings *\/ member in struct:__anon7239
    [all...]
hci_event.c 642 cp.settings = htole16(unit->hci_link_policy);
  /src/sys/external/bsd/acpica/dist/compiler/
readme.txt 133 Project/Settings/CustomBuild with the following settings (or similar):
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212_reset.c 553 * settings we make here are preserved.
655 /* Restore user-specified settings */
1381 ar5212SetAntennaSwitchInternal(struct ath_hal *ah, HAL_ANT_SETTING settings,
1425 switch (settings) {
1436 __func__, settings);
1452 ahp->ah_antControl = settings;
2626 /* Adjust various register settings based on half/quarter rate clock setting.
ar5212.h 283 uint32_t ah_staId1Defaults; /* STA_ID1 default settings */
284 uint32_t ah_miscMode; /* MISC_MODE settings */
285 uint32_t ah_rssiThr; /* RSSI_THR settings */
547 HAL_ANT_SETTING settings, const HAL_CHANNEL_INTERNAL *ichan);
  /src/sys/net/
if_spppsubr.c 6162 struct spppkeepalivesettings *settings = local
6166 settings->maxalive = sp->pp_maxalive;
6167 settings->max_noreceive = sp->pp_max_noreceive;
6168 settings->alive_interval = sp->pp_alive_interval;
6174 struct spppkeepalivesettings *settings = local
6178 sp->pp_maxalive = settings->maxalive;
6179 sp->pp_max_noreceive = settings->max_noreceive;
6180 sp->pp_alive_interval = settings->alive_interval;
  /src/sys/dev/i2o/
i2o.h 511 u_int8_t settings; member in struct:i2o_param_hba_scsi_ctlr_info
  /src/tools/compat/
configure 8633 -V, --version print version number and configuration settings, then exit

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