| /src/sys/arch/powerpc/booke/dev/ |
| e500wdog.c | 123 uint32_t tcr = mfspr(SPR_TCR); local
125 tcr = (tcr & ~TCR_WRC) | TCR_WRC_RESET | TCR_WIE;
128 tcr &= ~(TCR_WP|TCR_WPEXT);
129 tcr |= __SHIFTIN(wp, TCR_WP) | __SHIFTIN(wp >> 2, TCR_WPEXT);
130 mtspr(SPR_TCR, tcr);
150 const uint32_t tcr = mfspr(SPR_TCR); local
151 u_int wp = __SHIFTOUT(tcr, TCR_WP) | (__SHIFTOUT(tcr, TCR_WPEXT) << 2);
154 printf(" tcr=%#x wp=%u", tcr, wp)
[all...] |
| /src/sys/arch/vax/vsa/ |
| dz_vsbus.c | 80 REG(tcr); /* 08 Tcr: transmit console register */
117 i = dzP->tcr;
119 dzP->tcr = 0;
121 dzP->tcr = 1;
123 dzP->tcr = i;
284 dz->tcr = (1 << minor(cndev->cn_dev)); /* Turn on xmitter */
294 dz->tcr = (1 << minor(cndev->cn_dev)); /* Turn on xmitter */
305 u_short tcr; local
311 tcr = dz->tcr; /* remember which lines to scan *
364 u_short tcr; local
[all...] |
| /src/sys/arch/pmax/ibus/ |
| dz_ibus.c | 125 uint16_t tcr; /* 10 Tcr: transmit console */ member in struct:dzregs
189 i = dz->tcr;
191 dz->tcr = 0;
194 dz->tcr = 1;
197 dz->tcr = i;
292 dzcn->tcr = (1 << line);
339 uint16_t tcr; local
347 tcr = dzcn->tcr;
431 uint16_t tcr; local
[all...] |
| /src/sys/arch/arm/sunxi/ |
| sun6i_spi.c | 194 uint32_t tcr, cctl; local
206 tcr = SPI_TCR_SS_LEVEL | SPI_TCR_SPOL;
210 tcr |= 0;
213 tcr |= SPI_TCR_CPHA;
216 tcr |= SPI_TCR_CPOL;
219 tcr |= SPI_TCR_CPHA|SPI_TCR_CPOL;
225 sc->sc_TCR = tcr;
240 device_printf(sc->sc_dev, "tcr 0x%x, cctl 0x%x, CLK %uHz, SCLK %uHz\n",
241 tcr, cctl, sc->sc_modclkrate,
271 uint32_t isr, tcr; local
[all...] |
| /src/sys/arch/powerpc/ibm4xx/dev/ |
| wdog.c | 148 uint32_t tcr = mfspr(SPR_TCR); local
149 tcr |= TCR_WP_2_29 | TCR_WRC_SYSTEM;
150 mtspr(SPR_TCR, tcr);
|
| /src/lib/libkvm/ |
| kvm_m68k_gen.c | 204 vmst->pgshift = __SHIFTOUT(gen->tcr, TCR51_PS);
206 /* Invalid PS field in TCR. */
213 unsigned int is = __SHIFTOUT(gen->tcr, TCR51_IS);
214 ti[0] = __SHIFTOUT(gen->tcr, TCR51_TIA);
215 ti[1] = __SHIFTOUT(gen->tcr, TCR51_TIB);
216 ti[2] = __SHIFTOUT(gen->tcr, TCR51_TIC);
217 ti[3] = __SHIFTOUT(gen->tcr, TCR51_TID);
232 * as indicated by the TCR. The initial shift is intended to
|
| /src/sys/arch/m68k/include/ |
| kcore.h | 70 uint32_t tcr; /* Translation Control Register */ member in struct:gen68k_kcore_hdr
|
| /src/sys/arch/aarch64/aarch64/ |
| aarch64_machdep.c | 179 uint64_t tcr = reg_tcr_el1_read(); local
180 reg_tcr_el1_write(tcr | TCR_EPD0);
462 uint64_t tcr = reg_tcr_el1_read(); local
465 tcr |= TCR_TBI0;
467 tcr &= ~TCR_TBI0;
468 reg_tcr_el1_write(tcr);
476 uint64_t tcr; local
478 tcr = reg_tcr_el1_read();
479 cur = val = (tcr & TCR_TBI0) ? 1 : 0;
|
| cpufunc.c | 486 uint64_t tcr; local
528 tcr = reg_tcr_el1_read();
535 reg_tcr_el1_write(tcr | TCR_HA);
540 reg_tcr_el1_write(tcr | TCR_HD | TCR_HA);
|
| pmap.c | 1409 uint64_t tcr = reg_tcr_el1_read(); local
1410 reg_tcr_el1_write(tcr & ~TCR_EPD0);
1422 uint64_t tcr; local
1445 tcr = reg_tcr_el1_read();
1446 reg_tcr_el1_write(tcr & ~TCR_EPD0);
1466 uint64_t tcr = reg_tcr_el1_read(); local
1467 reg_tcr_el1_write(tcr | TCR_EPD0);
1486 uint64_t tcr; local
1495 tcr = reg_tcr_el1_read();
1496 reg_tcr_el1_write(tcr | TCR_EPD0)
[all...] |
| /src/sys/arch/amiga/dev/ |
| if_esreg.h | 34 volatile u_short tcr; /* Transmit Control Register */ member in struct:smcregs::__anon954
|
| if_es.c | 209 printf("TCR %04x EPHSR %04x RCR %04x ECR %04x MIR %04x MCR %04x\n",
210 SWAP(smc->b0.tcr), SWAP(smc->b0.ephsr), SWAP(smc->b0.rcr),
245 smc->b0.tcr = 0;
285 smc->b0.tcr = TCR_PAD_EN | (TCR_TXENA + TCR_MON_CSN);
431 u_short save_ptr, ephsr, tcr; local
448 tcr = smc->b0.tcr; /* and TCR */
462 if ((smc->b2.data & EPHSR_TX_SUC) == 0 && (tcr & TCR_TXENA) == 0) {
470 smc->b0.tcr |= TCR_TXENA
[all...] |
| /src/sys/dev/dec/ |
| dz.c | 312 u_char tcr; local
353 tcr = dz_read2(sc, sc->sc_dr.dr_tcrw);
354 tcr &= 255;
355 tcr &= ~(1 << line);
356 dz_write1(sc, sc->sc_dr.dr_tcr, tcr);
|
| /src/sys/arch/sandpoint/stand/altboot/ |
| rge.c | 124 unsigned tcr, rcr; member in struct:local
216 l->tcr = (03 << 24) | (07 << 8);
221 CSR_WRITE_4(l, RGE_TCR, l->tcr);
|
| /src/sys/dev/sbus/ |
| bpp.c | 228 DPRINTF(("bpp: hcr %x ocr %x tcr %x or %x\n",
254 DPRINTF(("bpp_setparams: hcr %x ocr %x tcr %x or %x, irq %x\n",
354 uint8_t tcr; local
370 tcr = bus_space_read_1(lsi->sc_bustag, lsi->sc_regs,
372 tcr &= ~BPP_TCR_DIR;
374 L64854_REG_TCR, tcr);
|
| /src/sys/arch/evbppc/virtex/dev/ |
| if_temac.c | 582 uint32_t rcr, tcr; local
600 tcr = (gmi_read_4(TEMAC_GMI_TXCF) | GMI_TX_ENABLE) &
602 gmi_write_4(TEMAC_GMI_TXCF, tcr);
1252 uint32_t rcr, tcr; local
1263 tcr = gmi_read_4(TEMAC_GMI_TXCF) & ~GMI_TX_ENABLE;
1264 gmi_write_4(TEMAC_GMI_TXCF, tcr);
|
| /src/sys/dev/ic/ |
| rtw.c | 347 uint32_t tcr; local
348 tcr = RTW_READ(regs, RTW_TCR);
349 tcr &= ~RTW_TCR_LBK_MASK;
351 tcr |= RTW_TCR_LBK_CONT;
353 tcr |= RTW_TCR_LBK_NORMAL;
354 RTW_WRITE(regs, RTW_TCR, tcr);
519 uint32_t tcr; local
522 tcr = RTW_TCR_CWMIN | RTW_TCR_MXDMA_2048 |
525 RTW_WRITE(regs, RTW_TCR, tcr);
2591 uint32_t tcr; local
[all...] |
| /src/sys/arch/arm/imx/ |
| if_enet.c | 1121 uint32_t tcr, tcr0; local
1130 tcr0 = tcr = ENET_REG_READ(sc, ENET_TCR);
1139 tcr |= ENET_TCR_FDEN; /* full duplex */
1142 tcr &= ~ENET_TCR_FDEN; /* half duplex */
1146 if ((tcr ^ tcr0) & ENET_TCR_FDEN) {
1172 tcr = tcr0;
1189 if (tcr != tcr0)
1190 ENET_REG_WRITE(sc, ENET_TCR, tcr);
|
| /src/sys/arch/hpc/stand/hpcboot/sh3/dev/ |
| sh3_dev.cpp | 260 paddr_t tcr)
267 /* TCR*/
268 r16 = _reg_read_2(tcr);
|
| /src/sys/arch/next68k/next68k/ |
| rtc.c | 315 settime_old(todr_chip_handle_t tcr, struct clock_ymdhms *dt)
|
| /src/sys/arch/powerpc/booke/ |
| e500_intr.c | 1404 uint32_t tcr = mfspr(SPR_TCR); local
1405 tcr |= TCR_WIE;
1406 mtspr(SPR_TCR, tcr);
|
| /src/sys/arch/m68k/m68k/ |
| pmap_68k.c | 3615 m->tcr = MMU_USE_3L ? MMU51_3L_TCR_BITS : MMU51_TCR_BITS;
|
