Searched refs:IP (Results 1 - 25 of 62) sorted by last modified time

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/xsrc/external/mit/xorgproto/dist/specs/SIAddresses/
H A Dhostname.md4 representing a hostname as defined in [IETF RFC 2396](https://tools.ietf.org/html/rfc2396). Due to Mobile IP
9 definition of hostname does not allow use of literal IP addresses.
/xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h108 i386_general_register SP, BP, SI, DI, IP; member in struct:i386_special_regs
157 #define R_IP spc.IP.I16_reg.x_reg
165 #define R_EIP spc.IP.I32_reg.e_reg
/xsrc/external/mit/xorg-server/dist/hw/xfree86/os-support/linux/int10/vm86/
H A Dlinux_vm86.c52 csp = lina = SEG_ADR((unsigned char *), X86_CS, IP);
/xsrc/external/mit/xorg-server/dist/hw/xfree86/int10/
H A Dhelper_exec.c170 uint32_t lina = SEG_ADR((uint32_t), X86_CS, IP);
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h106 i386_general_register SP, BP, SI, DI, IP; member in struct:i386_special_regs
146 #define R_IP spc.IP.I16_reg.x_reg
154 #define R_IP spc.IP.I16_reg.x_reg
162 #define R_EIP spc.IP.I32_reg.e_reg
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/os-support/linux/int10/vm86/
H A Dlinux_vm86.c52 csp = lina = SEG_ADR((unsigned char *), X86_CS, IP);
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/int10/
H A Dhelper_exec.c165 unsigned long lina = SEG_ADR((CARD32), X86_CS, IP);
/xsrc/external/mit/xf86-video-ati/dist/src/AtomBios/
H A DCD_Operations.c361 pParserTempData->pWorkingTableData->IP+=sizeof(UINT8);
366 pParserTempData->pWorkingTableData->IP+=sizeof(UINT16);
372 pParserTempData->Index=UINT16LE_TO_CPU(ldw_u((uint16_t *)pParserTempData->pWorkingTableData->IP));
373 pParserTempData->pWorkingTableData->IP+=sizeof(UINT16);
395 pParserTempData->Index=*pParserTempData->pWorkingTableData->IP;
396 pParserTempData->pWorkingTableData->IP+=sizeof(UINT8);
403 pParserTempData->Index=*pParserTempData->pWorkingTableData->IP;
404 pParserTempData->pWorkingTableData->IP+=sizeof(UINT8);
433 pParserTempData->Index=*pParserTempData->pWorkingTableData->IP;
434 pParserTempData->pWorkingTableData->IP
[all...]
H A DDecoder.c59 UINT8 opcode=((COMMAND_HEADER*)pParserTempData->pWorkingTableData->IP)->Opcode;
60 pParserTempData->pWorkingTableData->IP+=CallTable[opcode].headersize;
201 ParserTempData.pWorkingTableData->IP=((UINT8*)ParserTempData.pWorkingTableData->pTableHead)+sizeof(ATOM_COMMON_ROM_COMMAND_TABLE_HEADER);
213 if (IS_COMMAND_VALID(((COMMAND_HEADER*)ParserTempData.pWorkingTableData->IP)->Opcode))
215 ParserTempData.pCmd = (GENERIC_ATTRIBUTE_COMMAND*)ParserTempData.pWorkingTableData->IP;
217 if (IS_END_OF_TABLE(((COMMAND_HEADER*)ParserTempData.pWorkingTableData->IP)->Opcode))
/xsrc/external/mit/xf86-video-ati/dist/src/AtomBios/includes/
H A DCD_Structs.h427 COMMAND_HEADER_POINTER * IP; // Commands pointer member in struct:_WORKING_TABLE_DATA
H A DDecoder.h96 if (pParserTempData->SourceData32==(UINT32)((CASE_OFFSET*)pParserTempData->pWorkingTableData->IP)->XX_Access.size##.Access.Value){\
98 pParserTempData->pWorkingTableData->IP =(COMMAND_HEADER_POINTER *) RELATIVE_TO_TABLE(((CASE_OFFSET*)pParserTempData->pWorkingTableData->IP)->XX_Access.size##.Access.JumpOffset);\
100 pParserTempData->pWorkingTableData->IP+=(sizeof (CASE_##size##ACCESS)\
101 +sizeof(((CASE_OFFSET*)pParserTempData->pWorkingTableData->IP)->CaseSignature));\
/xsrc/external/mit/freetype/dist/src/truetype/
H A Dttinterp.h180 FT_Long IP; /* current instruction pointer */ member in struct:TT_ExecContextRec_
187 /* increment IP after ins. exec */
444 FT_Long IP );
H A Dttinterp.c113 * `exec', and `IP').
119 * IP ::
120 * The new IP in the new code range.
129 FT_Long IP )
142 /* range, we test for IP <= Size instead of IP < Size. */
144 FT_ASSERT( IP <= coderange->size );
148 exec->IP = IP;
720 /* IP */ PAC
127 TT_Goto_CodeRange(TT_ExecContext exec,FT_Int range,FT_Long IP) argument
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_emulate_loops.c63 unsigned int loop_i = (loop->EndLoop->IP - loop->BeginLoop->IP) - 1;
H A Dradeon_pair_regalloc.c232 s->LoopEnd > inst->IP ? s->LoopEnd : inst->IP;
551 if (endloop->IP > s->LoopEnd) {
552 s->LoopEnd = endloop->IP;
H A Dradeon_pair_schedule.c190 fprintf(stderr,"%u (%d) [%u],", ptr->Instruction->IP, score,
249 DBG("%i is now ready\n", sinst->Instruction->IP);
428 DBG("%i: commit score = %d\n", sinst->Instruction->IP, sinst->Score);
462 DBG("%i: commit TEX reads\n", readytex->Instruction->IP);
482 DBG("%i: commit TEX writes\n", readytex->Instruction->IP);
1177 DBG("%i: read %i[%i] chan %i\n", s->Current->Instruction->IP, file, index, chan);
1217 DBG("%i: write %i[%i] chan %i\n", s->Current->Instruction->IP, file, index, chan);
1278 inst->IP = ip++;
1280 DBG("%i: Scanning\n", inst->IP);
1289 DBG("%i: Has %i dependencies\n", inst->IP,
[all...]
H A Dradeon_program.c219 inst->IP = ip++;
222 c->Program.Instructions.IP = 0xcafedead;
H A Dradeon_program.h148 unsigned int IP; member in struct:rc_instruction
H A Dradeon_variable.c131 var->Inst->IP, reader->Inst->IP, src_type, new_index, new_writemask);
151 unsigned int start = var->Inst->IP;
156 unsigned int chan_end = var->Readers[i].Inst->IP;
168 if (var->Readers[i].Inst->IP < start) {
171 chan_start = bgnloop->IP;
201 if (bgnloop->IP < chan_start) {
202 chan_start = bgnloop->IP;
207 if (endloop->IP > chan_end) {
208 chan_end = endloop->IP;
[all...]
H A Dr500_fragprog.c72 * If the writer has a lower IP than inst_if, this
77 if (writer->ReaderCount > 1 || writer->Inst->IP < inst_if->IP) {
H A Dradeon_dataflow_deadcode.c155 struct instruction_state * insts = &s->Instructions[inst->IP];
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D21.3.0.rst922 - ir3: Make instruction IP 32 bits
H A D21.2.0.rst2733 - intel/compiler: Add the ability to defer IP updates in backend_instruction::remove
H A D20.3.0.rst2806 - intel/fs/ra: Sanity-check our IP counts
/xsrc/external/mit/MesaLib/dist/docs/isl/
H A Dccs.rst171 this chapter applies to any hardware with a graphics IP version 12 or above.

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