| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_gm107.cpp | 242 bld.mkOp2(OP_SHR , TYPE_U32, tmp1, tmp0, bld.mkImm(16)); 322 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(0), suq->getDef(0), 326 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(d), suq->getDef(d),
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| H A D | nv50_ir_target_gm107.cpp | 235 case OP_SHR:
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| H A D | nv50_ir_lowering_helper.cpp | 101 bld.mkOp2(OP_SHR, TYPE_S32, tmp, insn->getSrc(0), bld.loadImm(bld.getSSA(), 31));
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| H A D | nv50_ir_target_nvc0.cpp | 121 { OP_SHR, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 }, 358 if ((i->op == OP_SHL || i->op == OP_SHR) && typeSizeof(i->sType) == 8 && 650 case OP_SHR:
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| H A D | nv50_ir_lowering_nvc0.cpp | 242 operation antiop = op == OP_SHR ? OP_SHL : OP_SHR; 243 if (op == OP_SHR) 261 if (op == OP_SHR) 275 if (lo->op == OP_SHR) 345 case OP_SHR: 1846 return bld.mkOp2v(OP_SHR, TYPE_U32, bld.getSSA(), tmp, bld.mkImm(2)); 2018 src[2] = bld.mkOp2v(OP_SHR, TYPE_U32, bld.getSSA(), 2125 bld.mkOp2(OP_SHR, TYPE_U32, off, bf, bld.mkImm(8));
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| H A D | nv50_ir_peephole.cpp | 663 case OP_SHR: 1071 i->op = OP_SHR; 1191 i->op = OP_SHR; 1215 bld.mkOp2(OP_SHR, TYPE_U32, tA, tB, bld.mkImm(r)); 1221 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(0), tB, bld.mkImm(s)); 1246 bld.mkOp2(OP_SHR, TYPE_S32, tB, tA, bld.mkImm(l - 1)); 1401 src->op == OP_SHR && 1442 case OP_SHR: 2164 if (shift && shift->op == OP_SHR && 2175 } else if (insn->op == OP_SHR [all...] |
| H A D | nv50_ir_lowering_nv50.cpp | 122 i[8] = bld->mkOp2(OP_SHR, fTy, r[0], t[1], bld->mkImm(halfSize * 8)); 1197 bld.mkOp2(OP_SHR, TYPE_U32, def, def, bld.mkImm(16)); 1199 bld.mkOp2(OP_SHR, TYPE_U32, def, tid, bld.mkImm(26));
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| H A D | nv50_ir_target_nv50.cpp | 98 { OP_SHR, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
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| H A D | nv50_ir_emit_gk110.cpp | 949 if (i->op == OP_SHR) { 964 if (i->op == OP_SHR) { 2591 case OP_SHR:
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| H A D | nv50_ir_emit_nv50.cpp | 1584 code[1] = (i->op == OP_SHR) ? 0xe4000000 : 0xc4000000; 1585 if (i->op == OP_SHR && isSignedType(i->sType)) 1925 case OP_SHR:
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| H A D | nv50_ir.h | 71 OP_SHR, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_emit_nvc0.cpp | 970 if (i->op == OP_SHR) { 2764 case OP_SHR:
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_gm107.cpp | 340 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(0), suq->getDef(0), 344 bld.mkOp2(OP_SHR, TYPE_U32, suq->getDef(d), suq->getDef(d),
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| H A D | nv50_ir_target_gm107.cpp | 235 case OP_SHR:
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| H A D | nv50_ir_lowering_gv100.cpp | 267 case OP_SHR: 357 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(0), mask, bit);
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| H A D | nv50_ir_lowering_helper.cpp | 101 bld.mkOp2(OP_SHR, TYPE_S32, tmp, insn->getSrc(0), bld.loadImm(bld.getSSA(), 31));
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| H A D | nv50_ir_target_nvc0.cpp | 121 { OP_SHR, 0x0, 0x0, 0x0, 0x0, 0x2, 0x2 }, 362 if ((i->op == OP_SHL || i->op == OP_SHR) && typeSizeof(i->sType) == 8 && 660 case OP_SHR:
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| H A D | nv50_ir_lowering_nvc0.cpp | 242 operation antiop = op == OP_SHR ? OP_SHL : OP_SHR; 243 if (op == OP_SHR) 261 if (op == OP_SHR) 275 if (lo->op == OP_SHR) 353 case OP_SHR: 1867 return bld.mkOp2v(OP_SHR, TYPE_U32, bld.getSSA(), tmp, bld.mkImm(2)); 2039 src[2] = bld.mkOp2v(OP_SHR, TYPE_U32, bld.getSSA(), 2146 bld.mkOp2(OP_SHR, TYPE_U32, off, bf, bld.mkImm(8)); 2450 bld.mkOp2v(OP_SHR, TYPE_U3 [all...] |
| H A D | nv50_ir_lowering_nv50.cpp | 140 i[8] = bld->mkOp2(OP_SHR, fTy, r[0], t[1], bld->mkImm(halfSize * 8)); 1095 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(d), i->getDef(d), ms_x); 1099 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(d), i->getDef(d), ms_y); 1309 bld.mkOp2(OP_SHR, TYPE_U32, def, def, bld.mkImm(16)); 1311 bld.mkOp2(OP_SHR, TYPE_U32, def, tid, bld.mkImm(26)); 1787 tile[i] = bld.mkOp2v(OP_SHR, TYPE_U16, bld.getSSA(2), coords[i], tile_shift[i]); 1901 shifted = bld.mkOp2v(OP_SHR, TYPE_U16, bld.getSSA(2), src[!!(i & 2)], bld.loadImm(NULL, (uint16_t)8)); 1921 OP_SHR, ty, typedDst[i], 2048 bld.mkOp2(OP_SHR, TYPE_U16, untypedDst16[i], untypedDst16[i], bld.loadImm(NULL, (uint16_t)(15 - format->bits[i])));
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| H A D | nv50_ir_target_gv100.cpp | 371 case OP_SHR: return &opInfo_SHR; 495 if ((i->op == OP_SHL || i->op == OP_SHR) &&
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| H A D | nv50_ir_peephole.cpp | 679 case OP_SHR: 1104 i->op = OP_SHR; 1227 i->op = OP_SHR; 1251 bld.mkOp2(OP_SHR, TYPE_U32, tA, tB, bld.mkImm(r)); 1257 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(0), tB, bld.mkImm(s)); 1282 bld.mkOp2(OP_SHR, TYPE_S32, tB, tA, bld.mkImm(l - 1)); 1437 src->op == OP_SHR && 1484 case OP_SHR: 2217 if (shift && shift->op == OP_SHR && 2228 } else if (insn->op == OP_SHR [all...] |
| H A D | nv50_ir_target_nv50.cpp | 98 { OP_SHR, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
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| H A D | nv50_ir_emit_gk110.cpp | 947 if (i->op == OP_SHR) { 962 if (i->op == OP_SHR) { 2598 case OP_SHR:
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| H A D | nv50_ir_emit_nv50.cpp | 1660 code[1] = (i->op == OP_SHR) ? 0xe0000000 : 0xc0000000; 1663 if (i->op == OP_SHR && isSignedType(i->sType)) 2012 case OP_SHR:
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| H A D | nv50_ir.h | 72 OP_SHR, enumerator in enum:nv50_ir::operation
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