Searched refs:OP_XMAD (Results 1 - 14 of 14) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 67 case OP_XMAD: 240 case OP_XMAD:
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| H A D | nv50_ir_target_nvc0.cpp | 165 { OP_XMAD, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }, 362 if (i->op == OP_XMAD && sf == FILE_MEMORY_CONST && 366 if (i->op == OP_XMAD && sf == FILE_MEMORY_CONST && s == 2 && 370 if (i->op == OP_XMAD && sf == FILE_IMMEDIATE && s < 2 && 410 if (i->op == OP_XMAD && reg.data.u32 > 0xffff) 468 if (op == OP_XMAD) 489 case OP_XMAD:
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| H A D | nv50_ir_peephole.cpp | 196 insn->op != OP_SUB && insn->op != OP_XMAD) 199 if (insn->op == OP_XMAD && 202 if (insn->op == OP_XMAD && (insn->subOp & NV50_IR_SUBOP_XMAD_MRG)) 248 if (insn->op == OP_XMAD) { 1006 target->isOpSupported(OP_XMAD, TYPE_U32)) { 1007 Value *tmp = bld.mkOp3v(OP_XMAD, TYPE_U32, bld.getSSA(), 1009 bld.mkOp3(OP_XMAD, TYPE_U32, def, a, bld.mkImm((uint32_t)b), tmp)->subOp = 2454 if (!prog->getTarget()->isOpSupported(OP_XMAD, TYPE_U32)) 2474 Instruction *insn = bld.mkOp3(OP_XMAD, TYPE_U32, tmp0, b, a, c); 2477 insn = bld.mkOp3(OP_XMAD, TYPE_U3 [all...] |
| H A D | nv50_ir_print.cpp | 662 case OP_XMAD: {
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| H A D | nv50_ir_target_nv50.cpp | 446 case OP_XMAD:
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| H A D | nv50_ir.h | 63 OP_XMAD, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_emit_gm107.cpp | 3475 case OP_XMAD:
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 67 case OP_XMAD: 240 case OP_XMAD:
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| H A D | nv50_ir_target_nvc0.cpp | 165 { OP_XMAD, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }, 366 if (i->op == OP_XMAD && sf == FILE_MEMORY_CONST && 370 if (i->op == OP_XMAD && sf == FILE_MEMORY_CONST && s == 2 && 374 if (i->op == OP_XMAD && sf == FILE_IMMEDIATE && s < 2 && 420 if (i->op == OP_XMAD && reg.data.u32 > 0xffff) 478 if (op == OP_XMAD) 499 case OP_XMAD:
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| H A D | nv50_ir_peephole.cpp | 196 insn->op != OP_SUB && insn->op != OP_XMAD) 199 if (insn->op == OP_XMAD && 202 if (insn->op == OP_XMAD && (insn->subOp & NV50_IR_SUBOP_XMAD_MRG)) 248 if (insn->op == OP_XMAD) { 1039 target->isOpSupported(OP_XMAD, TYPE_U32)) { 1040 Value *tmp = bld.mkOp3v(OP_XMAD, TYPE_U32, bld.getSSA(), 1042 bld.mkOp3(OP_XMAD, TYPE_U32, def, a, bld.mkImm((uint32_t)b), tmp)->subOp = 2507 if (!prog->getTarget()->isOpSupported(OP_XMAD, TYPE_U32)) 2527 Instruction *insn = bld.mkOp3(OP_XMAD, TYPE_U32, tmp0, b, a, c); 2530 insn = bld.mkOp3(OP_XMAD, TYPE_U3 [all...] |
| H A D | nv50_ir_target_nv50.cpp | 457 case OP_XMAD:
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| H A D | nv50_ir.h | 63 OP_XMAD, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_print.cpp | 702 case OP_XMAD: {
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| H A D | nv50_ir_emit_gm107.cpp | 3540 case OP_XMAD:
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