Searched refs:PIPE_CONTROL_WRITETIMESTAMP (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h124 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h124 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h124 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h124 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h124 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 macro

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