Searched refs:RADV_DYNAMIC_STENCIL_WRITE_MASK (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_private.h850 RADV_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, enumerator in enum:radv_dynamic_state_bits
H A Dradv_pipeline.c1268 return RADV_DYNAMIC_STENCIL_WRITE_MASK;
1297 RADV_DYNAMIC_STENCIL_WRITE_MASK |
1406 if (states & RADV_DYNAMIC_STENCIL_WRITE_MASK) {
H A Dradv_cmd_buffer.c169 if (copy_mask & RADV_DYNAMIC_STENCIL_WRITE_MASK) {
173 dest_mask |= RADV_DYNAMIC_STENCIL_WRITE_MASK;
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_pipeline.c1258 return RADV_DYNAMIC_STENCIL_WRITE_MASK;
1355 states &= ~(RADV_DYNAMIC_STENCIL_COMPARE_MASK | RADV_DYNAMIC_STENCIL_WRITE_MASK |
1602 if (states & RADV_DYNAMIC_STENCIL_WRITE_MASK) {
H A Dradv_private.h985 RADV_DYNAMIC_STENCIL_WRITE_MASK = 1ull << 7, enumerator in enum:radv_dynamic_state_bits
H A Dradv_cmd_buffer.c199 if (copy_mask & RADV_DYNAMIC_STENCIL_WRITE_MASK) {
203 dest_mask |= RADV_DYNAMIC_STENCIL_WRITE_MASK;

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