Searched refs:cmask_offset (Results 1 - 13 of 13) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_clear.c654 tex->surface.cmask_offset, tex->surface.cmask_size, 0xCCCCCCCC);
685 uint64_t cmask_offset = 0; local in function:si_fast_clear
702 cmask_offset = tex->surface.cmask_offset + tex->surface.u.gfx9.color.cmask_level0.offset;
706 cmask_offset = tex->surface.cmask_offset;
722 cmask_offset = tex->surface.cmask_offset;
729 cmask_offset = tex->surface.cmask_offset;
[all...]
H A Dsi_texture.c473 tex->surface.cmask_offset = new_tex->surface.cmask_offset;
987 if (tex->surface.cmask_offset) {
1028 tex->surface.cmask_offset, tex->surface.cmask_size,
1114 tex->cmask_base_address_reg = (tex->buffer.gpu_address + tex->surface.cmask_offset) >> 8;
1735 tex->cmask_base_address_reg = (tex->buffer.gpu_address + tex->surface.cmask_offset) >> 8;
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_surface.c454 surf_ws->cmask_offset = align64(surf_ws->total_size, 1 << surf_ws->cmask_alignment_log2);
455 surf_ws->total_size = surf_ws->cmask_offset + surf_ws->cmask_size;
/xsrc/external/mit/MesaLib/dist/src/amd/common/
H A Dac_surface.h380 uint64_t cmask_offset; member in struct:radeon_surf
H A Dac_surface.c2403 surf->meta_offset = surf->display_dcc_offset = surf->fmask_offset = surf->cmask_offset = 0;
2414 surf->cmask_offset = align64(surf->total_size, 1 << surf->cmask_alignment_log2);
2415 surf->total_size = surf->cmask_offset + surf->cmask_size;
2452 if (!surf->fmask_offset && !surf->cmask_offset) {
2836 if (surf->cmask_offset)
2837 surf->cmask_offset += offset;
2938 if (surf->cmask_offset)
2942 surf->cmask_offset, surf->cmask_size,
2991 if (surf->cmask_offset)
2995 surf->cmask_offset, sur
[all...]
H A Dac_surface_modifier_test.c258 assert(surf.cmask_offset == 0);
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_image.c1014 va = gpu_address + image->offset + image->planes[0].surface.cmask_offset;
1192 va = gpu_address + image->offset + image->planes[0].surface.cmask_offset;
1207 va = gpu_address + image->offset + image->planes[0].surface.cmask_offset;
1310 if (!surf->cmask_size || surf->cmask_offset || surf->bpe > 8 || image->info.levels > 1 ||
1318 surf->cmask_offset = align64(surf->total_size, 1 << surf->cmask_alignment_log2);
1319 surf->total_size = surf->cmask_offset + surf->cmask_size;
H A Dradv_meta_clear.c1425 uint64_t offset = image->offset + image->planes[0].surface.cmask_offset;
H A Dradv_private.h2019 return image->planes[0].surface.cmask_offset;
H A Dradv_device.c6672 va += surf->cmask_offset;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_texture.c561 tex->cmask_offset = new_tex->cmask_offset;
1087 tex->cmask_offset,
1141 tex->cmask_offset, tex->surface.cmask_size, tex->surface.cmask_alignment,
1281 tex->cmask_offset = align64(tex->size, tex->surface.cmask_alignment);
1282 tex->size = tex->cmask_offset + tex->surface.cmask_size;
1348 tex->cmask_offset, tex->surface.cmask_size,
1462 (tex->buffer.gpu_address + tex->cmask_offset) >> 8;
1834 (tex->buffer.gpu_address + tex->cmask_offset) >> 8;
H A Dsi_clear.c498 tex->cmask_offset, tex->surface.cmask_size,
526 tex->cmask_offset, tex->surface.cmask_size,
H A Dsi_pipe.h289 uint64_t cmask_offset; member in struct:si_texture

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