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    Searched refs:vidcfg (Results 1 - 4 of 4) sorted by relevancy

  /xsrc/external/mit/xf86-video-tdfx/dist/src/
tdfx_hwcurs.c 106 pTDFX->ModeReg.vidcfg|=BIT(27);
107 pTDFX->writeLong(pTDFX, VIDPROCCFG, pTDFX->ModeReg.vidcfg);
117 pTDFX->ModeReg.vidcfg&=~BIT(27);
118 pTDFX->writeLong(pTDFX, VIDPROCCFG, pTDFX->ModeReg.vidcfg);
tdfx_video.c 697 pTDFX->ModeReg.vidcfg &= ~VIDPROCCFGMASK;
698 pTDFX->writeLong(pTDFX, VIDPROCCFG, pTDFX->ModeReg.vidcfg);
715 pTDFX->ModeReg.vidcfg &= ~VIDPROCCFGMASK;
716 pTDFX->writeLong(pTDFX, VIDPROCCFG, pTDFX->ModeReg.vidcfg);
747 The "1" bits are the bits cleared to 0 in pTDFX->ModeReg.vidcfg
809 pTDFX->ModeReg.vidcfg &= ~VIDPROCCFGMASK;
810 pTDFX->ModeReg.vidcfg |= 0x00000320;
812 if(drw_w != src_w) pTDFX->ModeReg.vidcfg |= (1 << 14);
813 if(drw_h != src_h) pTDFX->ModeReg.vidcfg |= (1 << 15);
814 if(id == FOURCC_UYVY) pTDFX->ModeReg.vidcfg |= (6 << 21)
    [all...]
tdfx_driver.c 1399 ErrorF("VidCfg = %x versus %x\n", pTDFX->readLong(pTDFX, VIDPROCCFG), regs->vidcfg);
1453 tdfxReg->vidcfg=pTDFX->readLong(pTDFX, VIDPROCCFG);
1539 pTDFX->writeLong(pTDFX, VIDPROCCFG, tdfxReg->vidcfg);
1639 tdfxReg->vidcfg&=~SST_VIDEO_2X_MODE_EN;
1646 tdfxReg->vidcfg|=SST_VIDEO_2X_MODE_EN;
1817 tdfxReg->vidcfg = SST_VIDEO_PROCESSOR_EN | SST_CURSOR_X11 | SST_DESKTOP_EN |
1820 /* tdfxReg->vidcfg |= SST_DESKTOP_CLUT_BYPASS; */
1878 tdfxReg->vidcfg |= SST_HALF_MODE;
1881 tdfxReg->vidcfg &= ~SST_HALF_MODE
    [all...]
tdfx.h 163 unsigned int vidcfg; member in struct:__anon9435

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