| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cik_structs.h | 82 uint32_t cp_mqd_base_addr_hi; member in struct:cik_mqd
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| cik_structs.h | 82 uint32_t cp_mqd_base_addr_hi; member in struct:cik_mqd
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| vi_structs.h | 291 uint32_t cp_mqd_base_addr_hi; member in struct:vi_mqd
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| vi_structs.h | 291 uint32_t cp_mqd_base_addr_hi; member in struct:vi_mqd
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| v10_structs.h | 160 uint32_t cp_mqd_base_addr_hi; // offset: 129 (0x81) member in struct:v10_gfx_mqd
808 uint32_t cp_mqd_base_addr_hi; member in struct:v10_compute_mqd
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| v10_structs.h | 160 uint32_t cp_mqd_base_addr_hi; // offset: 129 (0x81) member in struct:v10_gfx_mqd
808 uint32_t cp_mqd_base_addr_hi; member in struct:v10_compute_mqd
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| v9_structs.h | 291 uint32_t cp_mqd_base_addr_hi; member in struct:v9_mqd
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| v9_structs.h | 291 uint32_t cp_mqd_base_addr_hi; member in struct:v9_mqd
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_mqd_manager_cik.c | 121 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_v10.c | 117 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_v9.c | 152 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_vi.c | 121 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_cik.c | 121 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_v10.c | 117 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_v9.c | 152 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| kfd_mqd_manager_vi.c | 121 m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_amdkfd_gfx_v10.c | 385 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);
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| amdgpu_amdkfd_gfx_v9.c | 373 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);
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| amdgpu_amdkfd_gfx_v10.c | 385 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);
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| amdgpu_amdkfd_gfx_v9.c | 373 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);
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| amdgpu_gfx_v10_0.c | 2992 mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);
3077 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);
3276 mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);
3401 mqd->cp_mqd_base_addr_hi);
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| amdgpu_gfx_v10_0.c | 2992 mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);
3077 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);
3276 mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);
3401 mqd->cp_mqd_base_addr_hi);
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| amdgpu_gfx_v7_0.c | 2846 u32 cp_mqd_base_addr_hi; member in struct:hqd_registers
2963 mqd->cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr);
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| amdgpu_gfx_v7_0.c | 2846 u32 cp_mqd_base_addr_hi; member in struct:hqd_registers
2963 mqd->cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr);
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cik.c | 4462 u32 cp_mqd_base_addr_hi; member in struct:hqd_registers
4669 mqd->queue_state.cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr);
4671 WREG32(CP_MQD_BASE_ADDR_HI, mqd->queue_state.cp_mqd_base_addr_hi);
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