HomeSort by: relevance | last modified time | path
    Searched refs:dce_environment (Results 1 - 25 of 72) sorted by relevancy

1 2 3

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
hw_translate.h 50 enum dce_environment dce_environment);
hw_translate.h 50 enum dce_environment dce_environment);
amdgpu_hw_translate.c 66 enum dce_environment dce_environment)
68 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
amdgpu_hw_translate.c 66 enum dce_environment dce_environment)
68 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
amdgpu_hw_factory.c 68 enum dce_environment dce_environment)
70 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
amdgpu_hw_factory.c 68 enum dce_environment dce_environment)
70 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
hw_factory.h 77 enum dce_environment dce_environment);
hw_factory.h 77 enum dce_environment dce_environment);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dc_types.h 57 enum dce_environment { enum
74 #define IS_FPGA_MAXIMUS_DC(dce_environment) \
75 (dce_environment == DCE_ENV_FPGA_MAXIMUS)
77 #define IS_DIAG_DC(dce_environment) \
78 (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG))
106 enum dce_environment dce_environment; member in struct:dc_context
dc_types.h 57 enum dce_environment { enum
74 #define IS_FPGA_MAXIMUS_DC(dce_environment) \
75 (dce_environment == DCE_ENV_FPGA_MAXIMUS)
77 #define IS_DIAG_DC(dce_environment) \
78 (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG))
106 enum dce_environment dce_environment; member in struct:dc_context
  /src/sys/external/bsd/drm2/dist/drm/amd/display/include/
gpio_service_interface.h 48 enum dce_environment dce_version_minor,
gpio_service_interface.h 48 enum dce_environment dce_version_minor,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/
amdgpu_rv1_clk_mgr_vbios_smu.c 108 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
amdgpu_rv1_clk_mgr_vbios_smu.c 108 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
amdgpu_dce112_hw_sequencer.c 128 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment))
amdgpu_dce112_hw_sequencer.c 128 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment))
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr_vbios_smu.c 99 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
amdgpu_rn_clk_mgr_vbios_smu.c 99 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_init.c 134 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
amdgpu_dcn20_init.c 134 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_init.c 143 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
amdgpu_dcn21_init.c 143 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/
amdgpu_dce112_clk_mgr.c 118 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
160 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
amdgpu_dce112_clk_mgr.c 118 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
160 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_link_hwss.c 406 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
455 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
480 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
545 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
554 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {

Completed in 98 milliseconds

1 2 3