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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/
amdgpu_bios_parser_helper.c 59 #define FN(reg_name, field_name) \
60 ATOM_ ## field_name ## _SHIFT, ATOM_ ## field_name
amdgpu_bios_parser_helper.c 59 #define FN(reg_name, field_name) \
60 ATOM_ ## field_name ## _SHIFT, ATOM_ ## field_name
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/
amdgpu_hw_factory_dcn20.c 67 #define SF_HPD(reg_name, field_name, post_fix)\
68 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
74 #define SF(reg_name, field_name, post_fix)\
75 .field_name = reg_name ## __ ## field_name ## post_fix
107 #define SF_DDC(reg_name, field_name, post_fix)\
108 .field_name = reg_name ## __ ## field_name ## post_fix
161 #define SF_GENERIC(reg_name, field_name, post_fix)
    [all...]
amdgpu_hw_factory_dcn20.c 67 #define SF_HPD(reg_name, field_name, post_fix)\
68 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
74 #define SF(reg_name, field_name, post_fix)\
75 .field_name = reg_name ## __ ## field_name ## post_fix
107 #define SF_DDC(reg_name, field_name, post_fix)\
108 .field_name = reg_name ## __ ## field_name ## post_fix
161 #define SF_GENERIC(reg_name, field_name, post_fix)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/
amdgpu_hw_factory_dcn21.c 65 #define SF_HPD(reg_name, field_name, post_fix)\
66 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
72 #define SF(reg_name, field_name, post_fix)\
73 .field_name = reg_name ## __ ## field_name ## post_fix
104 #define SF_DDC(reg_name, field_name, post_fix)\
105 .field_name = reg_name ## __ ## field_name ## post_fix
144 #define SF_GENERIC(reg_name, field_name, post_fix)
    [all...]
amdgpu_hw_factory_dcn21.c 65 #define SF_HPD(reg_name, field_name, post_fix)\
66 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
72 #define SF(reg_name, field_name, post_fix)\
73 .field_name = reg_name ## __ ## field_name ## post_fix
104 #define SF_DDC(reg_name, field_name, post_fix)\
105 .field_name = reg_name ## __ ## field_name ## post_fix
144 #define SF_GENERIC(reg_name, field_name, post_fix)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/
amdgpu_hw_factory_dce120.c 51 #define SF_HPD(reg_name, field_name, post_fix)\
52 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
55 #define SF_HPD(reg_name, field_name, post_fix)\
56 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
101 #define SF_DDC(reg_name, field_name, post_fix)\
102 .field_name = reg_name ## __ ## field_name ## post_fix
amdgpu_hw_factory_dce120.c 51 #define SF_HPD(reg_name, field_name, post_fix)\
52 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
55 #define SF_HPD(reg_name, field_name, post_fix)\
56 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
101 #define SF_DDC(reg_name, field_name, post_fix)\
102 .field_name = reg_name ## __ ## field_name ## post_fix
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/
amdgpu_hw_factory_dcn10.c 52 #define SF_HPD(reg_name, field_name, post_fix)\
53 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
97 #define SF_DDC(reg_name, field_name, post_fix)\
98 .field_name = reg_name ## __ ## field_name ## post_fix
133 #define SF_GENERIC(reg_name, field_name, post_fix)\
134 .field_name = reg_name ## __ ## field_name ## post_fix
amdgpu_hw_factory_dcn10.c 52 #define SF_HPD(reg_name, field_name, post_fix)\
53 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
97 #define SF_DDC(reg_name, field_name, post_fix)\
98 .field_name = reg_name ## __ ## field_name ## post_fix
133 #define SF_GENERIC(reg_name, field_name, post_fix)\
134 .field_name = reg_name ## __ ## field_name ## post_fix
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
dcn20_dccg.h 46 #define DCCG_SF(reg_name, field_name, post_fix)\
47 .field_name = reg_name ## __ ## field_name ## post_fix
49 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\
50 .field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
dcn20_dccg.h 46 #define DCCG_SF(reg_name, field_name, post_fix)\
47 .field_name = reg_name ## __ ## field_name ## post_fix
49 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\
50 .field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
amdgpu_dcn20_vmid.c 43 #define FN(reg_name, field_name) \
44 vmid->shifts->field_name, vmid->masks->field_name
amdgpu_dcn20_vmid.c 43 #define FN(reg_name, field_name) \
44 vmid->shifts->field_name, vmid->masks->field_name
amdgpu_dcn20_dccg.c 44 #define FN(reg_name, field_name) \
45 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
dcn20_vmid.h 43 #define SF(reg_name, field_name, post_fix)\
44 .field_name = reg_name ## __ ## field_name ## post_fix
amdgpu_dcn20_dccg.c 44 #define FN(reg_name, field_name) \
45 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
dcn20_vmid.h 43 #define SF(reg_name, field_name, post_fix)\
44 .field_name = reg_name ## __ ## field_name ## post_fix
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce110/
amdgpu_hw_factory_dce110.c 47 #define SF_HPD(reg_name, field_name, post_fix)\
48 .field_name = reg_name ## __ ## field_name ## post_fix
88 #define SF_DDC(reg_name, field_name, post_fix)\
89 .field_name = reg_name ## __ ## field_name ## post_fix
amdgpu_hw_factory_dce110.c 47 #define SF_HPD(reg_name, field_name, post_fix)\
48 .field_name = reg_name ## __ ## field_name ## post_fix
88 #define SF_DDC(reg_name, field_name, post_fix)\
89 .field_name = reg_name ## __ ## field_name ## post_fix
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_ipp.c 41 #define FN(reg_name, field_name) \
42 ippn10->ipp_shift->field_name, ippn10->ipp_mask->field_name
amdgpu_dcn10_ipp.c 41 #define FN(reg_name, field_name) \
42 ippn10->ipp_shift->field_name, ippn10->ipp_mask->field_name
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_hwseq.c 50 #define FN(reg_name, field_name) \
51 hws->shifts->field_name, hws->masks->field_name
amdgpu_dcn21_hwseq.c 50 #define FN(reg_name, field_name) \
51 hws->shifts->field_name, hws->masks->field_name
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
amdgpu_hw_generic.c 44 #define FN(reg_name, field_name) \
45 generic->shifts->field_name, generic->masks->field_name

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