| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display_power.c | 274 u8 irq_pipe_mask, bool has_vga)
281 if (irq_pipe_mask)
282 gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
286 u8 irq_pipe_mask)
288 if (irq_pipe_mask)
289 gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
401 power_well->desc->hsw.irq_pipe_mask,
413 power_well->desc->hsw.irq_pipe_mask);
2861 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3062 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C)
[all...] |
| intel_display_power.c | 274 u8 irq_pipe_mask, bool has_vga)
281 if (irq_pipe_mask)
282 gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
286 u8 irq_pipe_mask)
288 if (irq_pipe_mask)
289 gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
401 power_well->desc->hsw.irq_pipe_mask,
413 power_well->desc->hsw.irq_pipe_mask);
2861 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3062 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C)
[all...] |
| intel_display_power.c | 274 u8 irq_pipe_mask, bool has_vga)
281 if (irq_pipe_mask)
282 gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
286 u8 irq_pipe_mask)
288 if (irq_pipe_mask)
289 gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
401 power_well->desc->hsw.irq_pipe_mask,
413 power_well->desc->hsw.irq_pipe_mask);
2861 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3062 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C)
[all...] |
| intel_display_power.h | 181 u8 irq_pipe_mask; member in struct:i915_power_well_desc::__anon93be6b3d010a::__anon93be6b3d0408
|
| intel_display_power.h | 181 u8 irq_pipe_mask; member in struct:i915_power_well_desc::__anon93be6b3d010a::__anon93be6b3d0408
|
| intel_display_power.h | 181 u8 irq_pipe_mask; member in struct:i915_power_well_desc::__anon93be6b3d010a::__anon93be6b3d0408
|
