HomeSort by: relevance | last modified time | path
    Searched refs:le16_to_cpu (Results 1 - 25 of 135) sorted by relevancy

1 2 3 4 5 6

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega10_processpptables.c 79 le16_to_cpu(powerplay_table->usStateArrayOffset));
136 le16_to_cpu(powerplay_table->usThermalControllerOffset));
171 le16_to_cpu(powerplay_table->usFanTableOffset));
183 le16_to_cpu(fan_table_v1->usFanOutputSensitivity);
185 le16_to_cpu(fan_table_v1->usFanRPMMax);
187 le16_to_cpu(fan_table_v1->usThrottlingRPM);
189 le16_to_cpu(fan_table_v1->usFanAcousticLimit);
191 le16_to_cpu(fan_table_v1->usTargetTemperature);
193 le16_to_cpu(fan_table_v1->usMinimumPWMLimit);
195 le16_to_cpu(fan_table_v1->usTargetGfxClk)
    [all...]
amdgpu_vega10_processpptables.c 79 le16_to_cpu(powerplay_table->usStateArrayOffset));
136 le16_to_cpu(powerplay_table->usThermalControllerOffset));
171 le16_to_cpu(powerplay_table->usFanTableOffset));
183 le16_to_cpu(fan_table_v1->usFanOutputSensitivity);
185 le16_to_cpu(fan_table_v1->usFanRPMMax);
187 le16_to_cpu(fan_table_v1->usThrottlingRPM);
189 le16_to_cpu(fan_table_v1->usFanAcousticLimit);
191 le16_to_cpu(fan_table_v1->usTargetTemperature);
193 le16_to_cpu(fan_table_v1->usMinimumPWMLimit);
195 le16_to_cpu(fan_table_v1->usTargetGfxClk)
    [all...]
amdgpu_vega10_processpptables.c 79 le16_to_cpu(powerplay_table->usStateArrayOffset));
136 le16_to_cpu(powerplay_table->usThermalControllerOffset));
171 le16_to_cpu(powerplay_table->usFanTableOffset));
183 le16_to_cpu(fan_table_v1->usFanOutputSensitivity);
185 le16_to_cpu(fan_table_v1->usFanRPMMax);
187 le16_to_cpu(fan_table_v1->usThrottlingRPM);
189 le16_to_cpu(fan_table_v1->usFanAcousticLimit);
191 le16_to_cpu(fan_table_v1->usTargetTemperature);
193 le16_to_cpu(fan_table_v1->usMinimumPWMLimit);
195 le16_to_cpu(fan_table_v1->usTargetGfxClk)
    [all...]
amdgpu_process_pptables_v1_0.c 191 record->us_vdd = le16_to_cpu(atom_record->usVdd);
192 record->us_cac_low = le16_to_cpu(atom_record->usCACLow);
193 record->us_cac_mid = le16_to_cpu(atom_record->usCACMid);
194 record->us_cac_high = le16_to_cpu(atom_record->usCACHigh);
222 = le16_to_cpu(atom_ppm_table->usCpuCoreNumber);
263 le16_to_cpu(powerplay_table->usUlvVoltageOffset);
270 le16_to_cpu(powerplay_table->usPowerControlLimit);
289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset));
298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset));
307 (((unsigned long)powerplay_table) + le16_to_cpu(powerplay_table->usPPMTableOffset))
    [all...]
amdgpu_process_pptables_v1_0.c 191 record->us_vdd = le16_to_cpu(atom_record->usVdd);
192 record->us_cac_low = le16_to_cpu(atom_record->usCACLow);
193 record->us_cac_mid = le16_to_cpu(atom_record->usCACMid);
194 record->us_cac_high = le16_to_cpu(atom_record->usCACHigh);
222 = le16_to_cpu(atom_ppm_table->usCpuCoreNumber);
263 le16_to_cpu(powerplay_table->usUlvVoltageOffset);
270 le16_to_cpu(powerplay_table->usPowerControlLimit);
289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset));
298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset));
307 (((unsigned long)powerplay_table) + le16_to_cpu(powerplay_table->usPPMTableOffset))
    [all...]
amdgpu_process_pptables_v1_0.c 191 record->us_vdd = le16_to_cpu(atom_record->usVdd);
192 record->us_cac_low = le16_to_cpu(atom_record->usCACLow);
193 record->us_cac_mid = le16_to_cpu(atom_record->usCACMid);
194 record->us_cac_high = le16_to_cpu(atom_record->usCACHigh);
222 = le16_to_cpu(atom_ppm_table->usCpuCoreNumber);
263 le16_to_cpu(powerplay_table->usUlvVoltageOffset);
270 le16_to_cpu(powerplay_table->usPowerControlLimit);
289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset));
298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset));
307 (((unsigned long)powerplay_table) + le16_to_cpu(powerplay_table->usPPMTableOffset))
    [all...]
amdgpu_processpptables.c 58 if (le16_to_cpu(powerplay_table->usTableSize) >=
67 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
68 if (le16_to_cpu(extended_header->usSize) >=
70 vce_table_offset = le16_to_cpu(extended_header->usVCETableOffset);
160 if (le16_to_cpu(powerplay_table->usTableSize) >=
168 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
169 if (le16_to_cpu(extended_header->usSize) >=
171 uvd_table_offset = le16_to_cpu(extended_header->usUVDTableOffset);
225 if (le16_to_cpu(powerplay_table->usTableSize) >=
233 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset))
    [all...]
amdgpu_processpptables.c 58 if (le16_to_cpu(powerplay_table->usTableSize) >=
67 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
68 if (le16_to_cpu(extended_header->usSize) >=
70 vce_table_offset = le16_to_cpu(extended_header->usVCETableOffset);
160 if (le16_to_cpu(powerplay_table->usTableSize) >=
168 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
169 if (le16_to_cpu(extended_header->usSize) >=
171 uvd_table_offset = le16_to_cpu(extended_header->usUVDTableOffset);
225 if (le16_to_cpu(powerplay_table->usTableSize) >=
233 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset))
    [all...]
amdgpu_processpptables.c 58 if (le16_to_cpu(powerplay_table->usTableSize) >=
67 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
68 if (le16_to_cpu(extended_header->usSize) >=
70 vce_table_offset = le16_to_cpu(extended_header->usVCETableOffset);
160 if (le16_to_cpu(powerplay_table->usTableSize) >=
168 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset));
169 if (le16_to_cpu(extended_header->usSize) >=
171 uvd_table_offset = le16_to_cpu(extended_header->usUVDTableOffset);
225 if (le16_to_cpu(powerplay_table->usTableSize) >=
233 le16_to_cpu(powerplay_table3->usExtendendedHeaderOffset))
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ucode.c 40 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
41 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
42 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
43 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
53 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
54 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
74 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
75 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
92 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
93 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor)
    [all...]
radeon_ucode.c 40 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
41 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
42 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
43 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
53 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
54 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
74 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
75 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
92 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
93 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor)
    [all...]
radeon_ucode.c 40 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
41 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
42 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
43 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
53 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
54 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
74 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
75 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
92 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
93 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor)
    [all...]
radeon_r600_dpm.c 839 radeon_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
841 radeon_table->entries[i].v = le16_to_cpu(entry->usVoltage);
864 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
865 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
895 if (le16_to_cpu(power_info->pplib.usTableSize) >=
899 le16_to_cpu(power_info->pplib3.usFanTableOffset));
901 rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
902 rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
903 rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
904 rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
radeon_r600_dpm.c 839 radeon_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
841 radeon_table->entries[i].v = le16_to_cpu(entry->usVoltage);
864 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
865 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
895 if (le16_to_cpu(power_info->pplib.usTableSize) >=
899 le16_to_cpu(power_info->pplib3.usFanTableOffset));
901 rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
902 rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
903 rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
904 rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
radeon_r600_dpm.c 839 radeon_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
841 radeon_table->entries[i].v = le16_to_cpu(entry->usVoltage);
864 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
865 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
895 if (le16_to_cpu(power_info->pplib.usTableSize) >=
899 le16_to_cpu(power_info->pplib3.usFanTableOffset));
901 rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
902 rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
903 rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
904 rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
radeon_atombios.c 66 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
67 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
68 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
77 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
90 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
102 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
103 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
104 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
105 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
106 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dpm.c 245 amdgpu_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
247 amdgpu_table->entries[i].v = le16_to_cpu(entry->usVoltage);
270 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
271 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
303 if (le16_to_cpu(power_info->pplib.usTableSize) >=
307 le16_to_cpu(power_info->pplib3.usFanTableOffset));
309 adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
310 adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
311 adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
312 adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
amdgpu_dpm.c 245 amdgpu_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
247 amdgpu_table->entries[i].v = le16_to_cpu(entry->usVoltage);
270 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
271 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
303 if (le16_to_cpu(power_info->pplib.usTableSize) >=
307 le16_to_cpu(power_info->pplib3.usFanTableOffset));
309 adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
310 adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
311 adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
312 adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
amdgpu_dpm.c 245 amdgpu_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |
247 amdgpu_table->entries[i].v = le16_to_cpu(entry->usVoltage);
270 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
271 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
303 if (le16_to_cpu(power_info->pplib.usTableSize) >=
307 le16_to_cpu(power_info->pplib3.usFanTableOffset));
309 adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
310 adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
311 adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
312 adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin)
    [all...]
amdgpu_discovery.c 208 offset = le16_to_cpu(info->offset);
209 checksum = le16_to_cpu(info->checksum);
226 offset = le16_to_cpu(info->offset);
227 checksum = le16_to_cpu(info->checksum);
273 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
274 num_dies = le16_to_cpu(ihdr->num_dies);
279 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
281 num_ips = le16_to_cpu(dhdr->num_ips);
284 if (le16_to_cpu(dhdr->die_id) != i) {
286 le16_to_cpu(dhdr->die_id), i)
    [all...]
amdgpu_discovery.c 208 offset = le16_to_cpu(info->offset);
209 checksum = le16_to_cpu(info->checksum);
226 offset = le16_to_cpu(info->offset);
227 checksum = le16_to_cpu(info->checksum);
273 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
274 num_dies = le16_to_cpu(ihdr->num_dies);
279 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
281 num_ips = le16_to_cpu(dhdr->num_ips);
284 if (le16_to_cpu(dhdr->die_id) != i) {
286 le16_to_cpu(dhdr->die_id), i)
    [all...]
amdgpu_discovery.c 208 offset = le16_to_cpu(info->offset);
209 checksum = le16_to_cpu(info->checksum);
226 offset = le16_to_cpu(info->offset);
227 checksum = le16_to_cpu(info->checksum);
273 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
274 num_dies = le16_to_cpu(ihdr->num_dies);
279 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
281 num_ips = le16_to_cpu(dhdr->num_ips);
284 if (le16_to_cpu(dhdr->die_id) != i) {
286 le16_to_cpu(dhdr->die_id), i)
    [all...]
amdgpu_atombios.c 59 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex);
60 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex);
61 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex);
62 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex);
63 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex);
64 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex);
65 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex);
66 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex);
191 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex);
290 le16_to_cpu(obj_header->usDisplayPathTableOffset))
    [all...]
amdgpu_atombios.c 59 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex);
60 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex);
61 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex);
62 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex);
63 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex);
64 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex);
65 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex);
66 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex);
191 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex);
290 le16_to_cpu(obj_header->usDisplayPathTableOffset))
    [all...]
amdgpu_atombios.c 59 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex);
60 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex);
61 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex);
62 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex);
63 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex);
64 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex);
65 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex);
66 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex);
191 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex);
290 le16_to_cpu(obj_header->usDisplayPathTableOffset))
    [all...]

Completed in 158 milliseconds

1 2 3 4 5 6