| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_nv25.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (!(flags & 2)) tile->zcomp = 0x00100000; /* Z16 */
42 else tile->zcomp = 0x00200000; /* Z24S8 */
43 tile->zcomp |= tile->tag->offset;
45 tile->zcomp |= 0x01000000;
53 .tile.regions = 8,
54 .tile.init = nv20_fb_tile_init,
55 .tile.comp = nv25_fb_tile_comp
[all...] |
| nouveau_nvkm_subdev_fb_nv25.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (!(flags & 2)) tile->zcomp = 0x00100000; /* Z16 */
42 else tile->zcomp = 0x00200000; /* Z24S8 */
43 tile->zcomp |= tile->tag->offset;
45 tile->zcomp |= 0x01000000;
53 .tile.regions = 8,
54 .tile.init = nv20_fb_tile_init,
55 .tile.comp = nv25_fb_tile_comp
[all...] |
| nouveau_nvkm_subdev_fb_nv20.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x00000001 | addr;
39 tile->limit = max(1u, addr + size) - 1;
40 tile->pitch = pitch;
42 fb->func->tile.comp(fb, i, size, flags, tile);
43 tile->addr |= 2;
49 struct nvkm_fb_tile *tile)
53 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
54 if (!(flags & 2)) tile->zcomp = 0x00000000; /* Z16 *
[all...] |
| nouveau_nvkm_subdev_fb_nv20.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x00000001 | addr;
39 tile->limit = max(1u, addr + size) - 1;
40 tile->pitch = pitch;
42 fb->func->tile.comp(fb, i, size, flags, tile);
43 tile->addr |= 2;
49 struct nvkm_fb_tile *tile)
53 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
54 if (!(flags & 2)) tile->zcomp = 0x00000000; /* Z16 *
[all...] |
| nouveau_nvkm_subdev_fb_nv46.c | 36 u32 flags, struct nvkm_fb_tile *tile)
39 if (!(flags & 4)) tile->addr = (0 << 3);
40 else tile->addr = (1 << 3);
42 tile->addr |= 0x00000001; /* mode = vram */
43 tile->addr |= addr;
44 tile->limit = max(1u, addr + size) - 1;
45 tile->pitch = pitch;
51 .tile.regions = 15,
52 .tile.init = nv46_fb_tile_init,
53 .tile.fini = nv20_fb_tile_fini
[all...] |
| nouveau_nvkm_subdev_fb_nv46.c | 36 u32 flags, struct nvkm_fb_tile *tile)
39 if (!(flags & 4)) tile->addr = (0 << 3);
40 else tile->addr = (1 << 3);
42 tile->addr |= 0x00000001; /* mode = vram */
43 tile->addr |= addr;
44 tile->limit = max(1u, addr + size) - 1;
45 tile->pitch = pitch;
51 .tile.regions = 15,
52 .tile.init = nv46_fb_tile_init,
53 .tile.fini = nv20_fb_tile_fini
[all...] |
| nouveau_nvkm_subdev_fb_nv10.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x80000000 | addr;
39 tile->limit = max(1u, addr + size) - 1;
40 tile->pitch = pitch;
44 nv10_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
46 tile->addr = 0;
47 tile->limit = 0;
48 tile->pitch = 0;
49 tile->zcomp = 0;
53 nv10_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
[all...] |
| nouveau_nvkm_subdev_fb_nv10.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x80000000 | addr;
39 tile->limit = max(1u, addr + size) - 1;
40 tile->pitch = pitch;
44 nv10_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
46 tile->addr = 0;
47 tile->limit = 0;
48 tile->pitch = 0;
49 tile->zcomp = 0;
53 nv10_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
[all...] |
| nouveau_nvkm_subdev_fb_nv1a.c | 36 .tile.regions = 8,
37 .tile.init = nv10_fb_tile_init,
38 .tile.fini = nv10_fb_tile_fini,
39 .tile.prog = nv10_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv4e.c | 37 .tile.regions = 12,
38 .tile.init = nv46_fb_tile_init,
39 .tile.fini = nv20_fb_tile_fini,
40 .tile.prog = nv44_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv1a.c | 36 .tile.regions = 8,
37 .tile.init = nv10_fb_tile_init,
38 .tile.fini = nv10_fb_tile_fini,
39 .tile.prog = nv10_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv4e.c | 37 .tile.regions = 12,
38 .tile.init = nv46_fb_tile_init,
39 .tile.fini = nv20_fb_tile_fini,
40 .tile.prog = nv44_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv47.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv49.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv47.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv49.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
|
| nouveau_nvkm_subdev_fb_nv35.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (flags & 2) tile->zcomp |= 0x04000000; /* Z16 */
42 else tile->zcomp |= 0x08000000; /* Z24S8 */
43 tile->zcomp |= ((tile->tag->offset ) >> 6);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 13;
46 tile->zcomp |= 0x40000000;
55 .tile.regions = 8
[all...] |
| nouveau_nvkm_subdev_fb_nv36.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (flags & 2) tile->zcomp |= 0x10000000; /* Z16 */
42 else tile->zcomp |= 0x20000000; /* Z24S8 */
43 tile->zcomp |= ((tile->tag->offset ) >> 6);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 14;
46 tile->zcomp |= 0x80000000;
55 .tile.regions = 8
[all...] |
| nouveau_nvkm_subdev_fb_nv35.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (flags & 2) tile->zcomp |= 0x04000000; /* Z16 */
42 else tile->zcomp |= 0x08000000; /* Z24S8 */
43 tile->zcomp |= ((tile->tag->offset ) >> 6);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 13;
46 tile->zcomp |= 0x40000000;
55 .tile.regions = 8
[all...] |
| nouveau_nvkm_subdev_fb_nv36.c | 36 struct nvkm_fb_tile *tile)
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
41 if (flags & 2) tile->zcomp |= 0x10000000; /* Z16 */
42 else tile->zcomp |= 0x20000000; /* Z24S8 */
43 tile->zcomp |= ((tile->tag->offset ) >> 6);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 14;
46 tile->zcomp |= 0x80000000;
55 .tile.regions = 8
[all...] |
| nouveau_nvkm_subdev_fb_nv40.c | 36 struct nvkm_fb_tile *tile)
41 !nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
42 tile->zcomp = 0x28000000; /* Z24S8_SPLIT_GRAD */
43 tile->zcomp |= ((tile->tag->offset ) >> 8);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13;
46 tile->zcomp |= 0x40000000;
61 .tile.regions = 8,
62 .tile.init = nv30_fb_tile_init
[all...] |
| nouveau_nvkm_subdev_fb_nv44.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x00000001; /* mode = vram */
39 tile->addr |= addr;
40 tile->limit = max(1u, addr + size) - 1;
41 tile->pitch = pitch;
45 nv44_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
48 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit);
49 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch);
50 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr);
65 .tile.regions = 12
[all...] |
| nouveau_nvkm_subdev_fb_nv40.c | 36 struct nvkm_fb_tile *tile)
41 !nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) {
42 tile->zcomp = 0x28000000; /* Z24S8_SPLIT_GRAD */
43 tile->zcomp |= ((tile->tag->offset ) >> 8);
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13;
46 tile->zcomp |= 0x40000000;
61 .tile.regions = 8,
62 .tile.init = nv30_fb_tile_init
[all...] |
| nouveau_nvkm_subdev_fb_nv44.c | 36 u32 flags, struct nvkm_fb_tile *tile)
38 tile->addr = 0x00000001; /* mode = vram */
39 tile->addr |= addr;
40 tile->limit = max(1u, addr + size) - 1;
41 tile->pitch = pitch;
45 nv44_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
48 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit);
49 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch);
50 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr);
65 .tile.regions = 12
[all...] |
| nouveau_nvkm_subdev_fb_nv41.c | 35 nv41_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile)
38 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit);
39 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch);
40 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr);
42 nvkm_wr32(device, 0x100700 + (i * 0x04), tile->zcomp);
55 .tile.regions = 12,
56 .tile.init = nv30_fb_tile_init,
57 .tile.comp = nv40_fb_tile_comp,
58 .tile.fini = nv20_fb_tile_fini,
59 .tile.prog = nv41_fb_tile_prog
[all...] |
